Hi Miroslav Lichvar,
Thank you for quick replay.
We are using Linux 3.19 version and the Hardware is a proprietary FPGA
Hardware.
I will try your suggestion.
Thank you.
Best Regards,
Sujatha
On Mon, Feb 15, 2016 at 3:36 PM, Miroslav Lichvar <mlich...@redhat.com>
wrote:
> On Mon, Feb 15, 2016 at 02:16:13PM +0530, Sujatha Guguloth wrote:
> > In Failire case (Logs provided below)
> > - slave clock is taking 340 - 278 = 62 seconds for stabilization
> > - jitter is maintained below 100ns after stabilization but it is very
> very
> > high compared to previous case during the stabilization stage
>
> It looks like the initial step is off by one second for some reason.
> It could be a driver issue. What HW and kernel version do you use?
>
> As a workaround you could try setting step_threshold to 0.1 for
> example and allow ptp4l to correct that one second error by stepping
> instead of slewing.
>
> > *Failure Logs:*
> > ptp4l[270.981]: selected /dev/ptp0 as PTP clock
> > ptp4l[271.014]: driver changed our HWTSTAMP options
> > ptp4l[271.020]: tx_type 1 not 1
> > ptp4l[271.024]: rx_filter 1 not 12
> > ptp4l[271.028]: port 1: INITIALIZING to LISTENING on INITIALIZE
> > ptp4l[271.040]: port 0: INITIALIZING to LISTENING on INITIALIZE
> > ptp4l[272.323]: port 1: new foreign master 001ec0.fffe.8614b5-1
> > ptp4l[276.323]: selected best master clock 001ec0.fffe.8614b5
> > ptp4l[276.328]: port 1: LISTENING to UNCALIBRATED on RS_SLAVE
> > ptp4l[278.496]: master offset -1475113437970290 s0 freq +0 path
> delay
> > 7176
> > ptp4l[279.496]: master offset -1475113437987402 s1 freq -17112 path
> delay
> > 7176
> > ptp4l[280.496]: master offset -1000000284 s2 freq -32767999 path delay
> > 7176
> > ptp4l[280.501]: port 1: UNCALIBRATED to SLAVE on MASTER_CLOCK_SELECTED
> > ptp4l[281.501]: master offset -967516976 s2 freq -32767999 path delay
>
> --
> Miroslav Lichvar
>
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