Hello,
I am happy to report that I was able to get HW timestamping working and two
of my A10 SoC kits (one as GM , one as slave) are synchronized, and the pps
output / offset reports are maintaining @ <30-40ns! It’s really neat to
watch them converge on the scope! Thanks very much to Ian and Hunter, who
both helped me to figure things out. I do have some problem where they
suddenly lose sync after about 5 minutes or so. The offsets suddenly jump
way up and it never gets back in sync. I will be debugging this next.
**************************************************************************
Just as information, in case it helps someone else who is trying to get ptp
HW timestamping working in an Altera SoC using the HPS EMAC, I thought I
would list what I had to do:
First off I am using the Altera-opensource 4.1.33-ltsi kernel on Arria 10
SoC kits, so results may be different with different kits/kernels/device
trees.
There are a few ptp-related kernel options in the .config file that must be
set to =y (yes). Just search for PTP or 1588 and enable everything, or use
the menu tool for the same.
The Cyclone V SoC and Arria10 SoC have implemented the STM Synopsys MAC IP
Core (stmmac) for the HPS MAC. Upon boot it should report: stmmac - user
ID: 0x10, Synopsys ID: 0x37
Once you verify this - the driver files are located in
/drivers/net/ethernet/stmicro/stmmac
I then manually applied the changes to a few of these driver files per
https://github.com/torvalds/linux/commit/19d857c9038e5c07db8f8cc02b5ad0cd0098714f
The device tree source must be changed to add the ptp engine clock, and this
must (obviously) be the correct clock for your implementation.
This was tricky for the A10 as there are dozens of clocks and I kept getting
it wrong until I figured it all out.
For the A10 Qsys has an option for using the Main PLL Clock or Peripheral
PLL clock. For my system I am using the C4 output (Feature EMAC PTP)
Peripheral PLL clock @ 100MHz.
In order to direct the driver to this clock there are 2 lines that must be
changed in the device tree source (you can see the old and new here):
//clocks = <&l4_mp_clk>; /* appended from boardinfo */
clocks = <&l4_mp_clk &peri_emac_ptp_clk>; /* appended from boardinfo */
//clock-names = "stmmaceth"; /*
embeddedsw.dts.params.clock-names type STRING */
clock-names = "stmmaceth","clk_ptp_ref"; /*
embeddedsw.dts.params.clock-names type STRING */
And then I downloaded and compiled the linuxPTP source, and installed the
output programs/files into my rootfs.
When running the ptp4l program (see man pages or search online for help) I
had to increase the following parameter, based on errors I was getting (this
was actually a suggestion from the program itself via the console).
[global]
tx_timestamp_timeout 100
So I made a ptp4l.conf file with these lines, and then directed ptp4l to use
this file as a config file.
There is a very helpful command for debugging the ptp engine clocking and it
is:
phc_ctl /dev/ptp0 freq 10000 set 0.0 wait 10.0 get
This will delay for 10 seconds from epoch and report how much time has
elapsed from epoch, based on the ptp clock. The output should be as
follows, if it’s reporting more or less then 10 seconds have elapsed, there
is a clock problem!
phc_ctl[9886.541]: adjusted clock frequency offset to 10000.000000ppb
phc_ctl[9886.541]: set clock time to 0.000000000 or Thu Jan 1 00:00:00 1970
phc_ctl[9896.541]: process slept for 10.000000 seconds
phc_ctl[9896.542]: clock time is 10.000404880 or Thu Jan 1 00:00:10 1970
Thank you,
John L.
From: Hunter Olson [mailto:hun...@alcorn.com]
Sent: Thursday, May 18, 2017 11:30 AM
To: John Lemonovich <john.lemonov...@foresys.com>
Cc: linuxptp-users@lists.sourceforge.net
Subject: Re: [Linuxptp-users] Adding LinuxPTP to Arria 10 SoC
John,
I'm going through the same troubles right now on Altera's Cyclone V SOC
platform.
I've found that if no PTP clock is specified for the emac entry in your
device tree, the stmmac driver defaults to expect the emac clock (250Mhz),
but it seems Altera is feeding in the eosc1 clock (25mhz). If you run the
testptp application, you'll see the ptp clock is running at 1/10th speed.
This is causing ptp4l to throw those 'clockcheck' warnings that you're
seeing.
See
<https://github.com/torvalds/linux/commit/bf171f01afe31f0c593deb55b96c3cb9e20cd6dd>
https://github.com/torvalds/linux/commit/bf171f01afe31f0c593deb55b96c3cb9e20cd6dd
for how to add the ptp clock to your device tree, allowing the driver to
grab the correct ptp clock rate.
I also backported to Altera's 4.1.22 some ptp related commits that show up
in mainline kernel 4.5, such as:
https://github.com/torvalds/linux/commit/19d857c9038e5c07db8f8cc02b5ad0cd0098714f
Like you noticed, I had to bump ptp4l's tx_timestamp_timeout up to 100.
Still testing, but it appears LinuxPTP H/W timestamping works after these
changes.
Regards,
Hunter
On Thu, May 18, 2017 at 9:02 AM, John Lemonovich
<john.lemonov...@foresys.com <mailto:john.lemonov...@foresys.com> > wrote:
Richard,
That's what I was afraid of. It seemed as though SW timestamping was
working, but then I had a problem with my rootfs in my Linux build, and I
didn't go back to try it again.
The Altera TSE MAC is listed as supported (whereas the ARM EMAC is not,
specifically), would you suspect I would have more luck with that? It's
only listed as supporting software timestamping - not PHC.
Thank you,
John
-----Original Message-----
From: Richard Cochran [mailto:richardcoch...@gmail.com
<mailto:richardcoch...@gmail.com> ]
Sent: Thursday, May 18, 2017 8:27 AM
To: John Lemonovich <john.lemonov...@foresys.com
<mailto:john.lemonov...@foresys.com> >
Cc: linuxptp-users@lists.sourceforge.net
<mailto:linuxptp-users@lists.sourceforge.net>
Subject: Re: [Linuxptp-users] Adding LinuxPTP to Arria 10 SoC
On Wed, May 17, 2017 at 02:29:09PM -0500, John Lemonovich wrote:
> Now I am trying with the -H option for PHC to achieve better timing
> (hopefully). Should it work for the EMAC with the 4.1.22-ltsi-altera
> kernel?
IIRC, last time I looked, the altera HW and drivers are hopelessly broken.
Ditto for the similar xilinx parts.
Neither have drivers in mainline Linux, IIRC.
Thanks,
Richard
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