Hi Mario,
In my device tree I put the altr,f2h_ptp_ref_clk in the compatible section and
not as its own node. Should it be its own node?
My device tree:
compatible = "altr,socfpga-stmmac", "snps,dwmac-3.74a", "snps,dwmac",
"altr,f2h_ptp_ref_clk";
Your device tree:
compatible = "synopsys,dwmac-16.1", "altr,socfpga-stmmac",
"snps,dwmac-3.70a", "snps,dwmac";
altr,f2h_ptp_ref_clk = "true";
Also, my ptp_ref clock (<&clkmgr 25>) is the equivalent to <&clkmgr
STRATIX10_PERI_EMAC_PTP_CLK>, I resolved the name to the number since I am
compiling directly with DTC and cannot include files with #defines in them.
#define STRATIX10_PERI_MPU_BASE_CLK 21
#define STRATIX10_PERI_NOC_BASE_CLK 22
#define STRATIX10_PERI_EMACA_CLK 23
#define STRATIX10_PERI_EMACB_CLK 24
#define STRATIX10_PERI_EMAC_PTP_CLK 25
#define STRATIX10_PERI_GPIO_DB_CLK 26
#define STRATIX10_PERI_SDMMC_CLK 27
#define STRATIX10_PERI_S2F_USR0_CLK 28
#define STRATIX10_PERI_S2F_USR1_CLK 29
#define STRATIX10_PERI_PSI_REF_CLK 30
I am using the peripheral emac ptp clock based on this posting:
https://lore.kernel.org/patchwork/patch/1024794/
It looks like you are just passing in a 125 MHz fixed clock as your PTP clock.
Are you using an internal clock and that is 125 MHz or are you feeding in an
external 125 MHz into the ARM (in my case s10_hps_emac_ptp_ref_clock_clk)? If
your method works, then I will follow you since what I am doing now is causing
issues.
Thanks,
Daniel
From: Mario Molitor <mario_moli...@web.de>
Sent: Friday, August 21, 2020 5:00 AM
To: Zuckerbrod, Daniel <dzuckerb...@textronsystems.com>
Cc: linuxptp-users@lists.sourceforge.net
Subject: Aw: RE: Re: [Linuxptp-users] Stratix 10 & PTP
Hello Daniel,
I have verified your provide dmesg printout and could not seen this problem.
But in your Dev-tree I miss altr,f2h_ptp_ref_clk = "true".
Also I miss 100 Mhz Clock in your dev-tree, but I think the first point
(f2h_ptp_ref_clk = "true") is more important.
For comparing see my following dev-tree cutting:
&gmac0 {
status = "okay";
compatible = "synopsys,dwmac-16.1", "altr,socfpga-stmmac",
"snps,dwmac-3.70a", "snps,dwmac";
altr,f2h_ptp_ref_clk = "true";
phy-handle = <&phy0>;
phy-mode = "rgmii";
//phy-addr = <0xffffffff>;
clocks = <&emac_0_clk &clk_125MHz>;
clock-names = "stmmaceth", "ptp_ref";
...
...
....
clocks {
...
clk_125MHz: clk_125MHz {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <125000000>; /* 125.00 MHz */
clock-output-names = "clk_125MHz-clk";
}; //end clk_125MHz (clk_125MHz)
Please let me know what happen if you have correct this.
Thanks
Mario
Gesendet: Donnerstag, 20. August 2020 um 16:50 Uhr
Von: "Zuckerbrod, Daniel"
<dzuckerb...@textronsystems.com<mailto:dzuckerb...@textronsystems.com>>
An: "Mario Molitor" <mario_moli...@web.de<mailto:mario_moli...@web.de>>
Cc:
"linuxptp-users@lists.sourceforge.net<mailto:linuxptp-users@lists.sourceforge.net>"
<linuxptp-users@lists.sourceforge.net<mailto:linuxptp-users@lists.sourceforge.net>>
Betreff: RE: Re: [Linuxptp-users] Stratix 10 & PTP
Hi Mario,
Attached are my 4.14.73-ltsi dmesg output and DTS. Please let me know if you
think this patch will help with the issue I am seeing.
Thanks,
Daniel
From: Mario Molitor <mario_moli...@web.de<mailto:mario_moli...@web.de>>
Sent: Wednesday, August 19, 2020 6:01 PM
To: Zuckerbrod, Daniel
<dzuckerb...@textronsystems.com<mailto:dzuckerb...@textronsystems.com>>
Cc:
linuxptp-users@lists.sourceforge.net<mailto:linuxptp-users@lists.sourceforge.net>
Subject: Aw: Re: [Linuxptp-users] Stratix 10 & PTP
Hello Daniel,
yes, i have running the PTP on Cyclone V and Linux 4.14.71. It was the attached
patch necessary. I think you should see in dmesg a hint in the case that patch
is necessary.
I think your problem is more a wrong setting in your Dev-Tree or wrong
connection in fpga. Could you please send me your Dev-Tree and your dmesg
printout for verify this?
Best regards,
Mario
Gesendet: Mittwoch, 19. August 2020 um 04:25 Uhr
Von: "Zuckerbrod, Daniel"
<dzuckerb...@textronsystems.com<mailto:dzuckerb...@textronsystems.com>>
An:
"linuxptp-users@lists.sourceforge.net<mailto:linuxptp-users@lists.sourceforge.net>"
<linuxptp-users@lists.sourceforge.net<mailto:linuxptp-users@lists.sourceforge.net>>
Betreff: Re: [Linuxptp-users] Stratix 10 & PTP
I have tried to move to Linux Kernel 5.7.0 (intel-socfpga) and ran into the
same issues. Does anyone have a working PTP implementation in an Intel FPGA?
From: Zuckerbrod, Daniel
Sent: Monday, August 10, 2020 9:27 AM
To:
linuxptp-users@lists.sourceforge.net<mailto:linuxptp-users@lists.sourceforge.net>
Subject: Stratix 10 & PTP
Hi,
I am using an Intel/Altera Stratix 10 and would like to use the ARM HPS EMAC
PTP interface. I am providing a 100 MHz to the s10_hps_emac_ptp_ref_clock_clk
with plans to use the PTP timestamp in the FPGA fabric. I can see the timestamp
serially shift out of the ARM as expected.
However, no matter what I change in the device tree I seem to always have
issues using hardware timestamping (./ptp4l -m -s -i eth1 -H).
Software timestamping always works without issue (./ptp4l -m -s -i eth1 -S).
I am not sure what the “freq” column means, but it always says -62500000:
ptp4l[276.189]: master offset -29715517212917536 s0 freq -62500000 path delay
35700952
ptp4l[277.189]: clockcheck: clock jumped backward or running slower than
expected!
I am using Linux Kernel version 4.14.73
Any help would be appreciated.
Thanks,
Daniel
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