On Monday, September 29, 2025 3:39:58 PM CEST Christian Schoenebeck wrote:
> On Thursday, June 19, 2025 8:35:53 AM CEST Philippe DIDIER wrote:
> > Le 18/06/2025 à 12:25, Christian Schoenebeck a écrit :
> [...]
>
> > > I think that also needs some correction. Can you test the following
> > > patch?
> > >
> > > Index: src/common/RTMath.cpp
> > > ===================================================================
> > > --- src/common/RTMath.cpp (revision 4334)
> > > +++ src/common/RTMath.cpp (working copy)
> > > @@ -74,16 +74,12 @@
> > >
> > > uint64_t t;
> > > asm volatile ("mrs %0, cntvct_el0" : "=r"(t));
> > > return (time_stamp_t) t;
> > >
> > > - #elif defined(__ARM_ARCH_7A__) || defined(__ARM_ARCH_7S__)
> > > - uint32_t t;
> > > - asm volatile ("mrs %0, cntvct_el0" : "=r"(t));
> > > - return t;
> > >
> > > #elif defined(__APPLE__)
> > > return (time_stamp_t) mach_absolute_time();
> > > #elif defined(__arm__) /* ARMv6 and older */
> > > # warning ARM 'mrc' instruction requires special runtime
> > > privileges!
> > > uint32_t t;
> > >
> > > - asm volatile ("mrc p15, 0, %0, c15, c12, 1" : "=r" (t));
> > > + asm volatile ("mrc p15, 0, %0, c9, c13, 0" : "=r" (t));
> > >
> > > return t;
> > > #else // we don't want to use a slow generic solution
> > > # error "Sorry, LinuxSampler lacks time stamp code for your
> > > system."
>
> [...]
>
> > I'm gonna test to compile with
> >
> > asm volatile ("mrc p15, 0, %0, c9, c13, 0" : "=r" (t));
> >
> >
> > Unfortunately we can't test the use on a real armv7hl system (using a
> > virtual system is not enough)
>
> It's been a while. Did you have a chance to test whether my suggested patch
> compiles for you?
I committed my suggested two ARM Assembly fixes:
https://svn.linuxsampler.org/cgi-bin/viewvc.cgi?view=revision&revision=4396
https://svn.linuxsampler.org/cgi-bin/viewvc.cgi?view=revision&revision=4397
The first one is obvious.
For the second one: I chose the Cycle Count register as officially specified
by the ARM specs (c9 0 c13 0):
https://developer.arm.com/documentation/ddi0344/k/system-control-coprocessor/system-control-coprocessor-registers/register-allocation
https://developer.arm.com/documentation/ddi0344/k/system-control-coprocessor/system-control-coprocessor-registers/c9--cycle-count-register
The old one apparently was an undocumented, ARM ISA implementer specific
register (which hence may only work on specific manufacturer dependent ARM
CPUs).
/Christian
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