The patch number 8473 was added via Mauro Carvalho Chehab <[EMAIL PROTECTED]>
to http://linuxtv.org/hg/v4l-dvb master development tree.

Kernel patches in this development tree may be modified to be backward
compatible with older kernels. Compatibility modifications will be
removed before inclusion into the mainstream Kernel

If anyone has any objections, please let us know by sending a message to:
        [EMAIL PROTECTED]

------

From: Mauro Carvalho Chehab  <[EMAIL PROTECTED]>
merge: http://www.linuxtv.org/hg/~stoth/v4l-dvb




Signed-off-by: Mauro Carvalho Chehab <[EMAIL PROTECTED]>


---

 linux/drivers/media/video/cx23885/cx23885-cards.c |   61 ++++-
 linux/drivers/media/video/cx23885/cx23885-core.c  |  153 ++++++++++++--
 2 files changed, 186 insertions(+), 28 deletions(-)

diff -r 227984e4b603 -r fc018c7e7fe3 
linux/drivers/media/video/cx23885/cx23885-cards.c
--- a/linux/drivers/media/video/cx23885/cx23885-cards.c Sat Jul 26 06:30:57 
2008 -0300
+++ b/linux/drivers/media/video/cx23885/cx23885-cards.c Sat Jul 26 06:34:47 
2008 -0300
@@ -146,9 +146,7 @@ struct cx23885_board cx23885_boards[] = 
        },
        [CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP] = {
                .name           = "DViCO FusionHDTV7 Dual Express",
-#if 0
                .portb          = CX23885_MPEG_DVB,
-#endif
                .portc          = CX23885_MPEG_DVB,
        },
 };
@@ -329,25 +327,41 @@ int cx23885_tuner_callback(void *priv, i
 {
        struct cx23885_i2c *bus = priv;
        struct cx23885_dev *dev = bus->dev;
+       u32 bitmask = 0;
+
+       if (command != 0) {
+               printk(KERN_ERR "%s(): Unknown command 0x%x.\n",
+                       __func__, command);
+               return -EINVAL;
+       }
 
        switch(dev->board) {
        case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
-               if(command == 0) {      /* Tuner Reset Command from xc5000 */
-                       /* Drive the tuner into reset and out */
-                       cx_clear(GP0_IO, 0x00000004);
-                       mdelay(200);
-                       cx_set(GP0_IO, 0x00000004);
-                       return 0;
+               /* Tuner Reset Command from xc5000 */
+               if (command == 0)
+                       bitmask = 0x04;
+               break;
+       case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
+               if (command == 0) {
+
+                       /* Two identical tuners on two different i2c buses,
+                        * we need to reset the correct gpio. */
+                       if (bus->nr == 0)
+                               bitmask = 0x01;
+                       else if (bus->nr == 1)
+                               bitmask = 0x04;
                }
-               else {
-                       printk(KERN_ERR
-                               "%s(): Unknow command.\n", __func__);
-                       return -EINVAL;
-               }
-               break;
-       }
-
-       return 0; /* Should never be here */
+               break;
+       }
+
+       if (bitmask) {
+               /* Drive the tuner into reset and back out */
+               cx_clear(GP0_IO, bitmask);
+               mdelay(200);
+               cx_set(GP0_IO, bitmask);
+       }
+
+       return 0;
 }
 
 void cx23885_gpio_setup(struct cx23885_dev *dev)
@@ -438,6 +452,19 @@ void cx23885_gpio_setup(struct cx23885_d
                cx_clear(GP0_IO, 0x00000005);
                mdelay(20);
                cx_set(GP0_IO, 0x00050005);
+               break;
+       case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
+               /* GPIO-0 xc5000 tuner reset i2c bus 0 */
+               /* GPIO-1 s5h1409 demod reset i2c bus 0 */
+               /* GPIO-2 xc5000 tuner reset i2c bus 1 */
+               /* GPIO-3 s5h1409 demod reset i2c bus 0 */
+
+               /* Put the parts into reset and back */
+               cx_set(GP0_IO, 0x000f0000);
+               mdelay(20);
+               cx_clear(GP0_IO, 0x0000000f);
+               mdelay(20);
+               cx_set(GP0_IO, 0x000f000f);
                break;
        }
 }
diff -r 227984e4b603 -r fc018c7e7fe3 
linux/drivers/media/video/cx23885/cx23885-core.c
--- a/linux/drivers/media/video/cx23885/cx23885-core.c  Sat Jul 26 06:30:57 
2008 -0300
+++ b/linux/drivers/media/video/cx23885/cx23885-core.c  Sat Jul 26 06:34:47 
2008 -0300
@@ -77,12 +77,12 @@ LIST_HEAD(cx23885_devlist);
  * 0x00010ea0 0x00010xxx Free
  */
 
-static struct sram_channel cx23887_sram_channels[] = {
+static struct sram_channel cx23885_sram_channels[] = {
        [SRAM_CH01] = {
                .name           = "VID A",
                .cmds_start     = 0x10000,
-               .ctrl_start     = 0x105b0,
-               .cdt            = 0x107b0,
+               .ctrl_start     = 0x10380,
+               .cdt            = 0x104c0,
                .fifo_start     = 0x40,
                .fifo_size      = 0x2800,
                .ptr1_reg       = DMA1_PTR1,
@@ -105,8 +105,8 @@ static struct sram_channel cx23887_sram_
        [SRAM_CH03] = {
                .name           = "TS1 B",
                .cmds_start     = 0x100A0,
-               .ctrl_start     = 0x10780,
-               .cdt            = 0x10400,
+               .ctrl_start     = 0x10400,
+               .cdt            = 0x10580,
                .fifo_start     = 0x5000,
                .fifo_size      = 0x1000,
                .ptr1_reg       = DMA3_PTR1,
@@ -141,7 +141,118 @@ static struct sram_channel cx23887_sram_
        [SRAM_CH06] = {
                .name           = "TS2 C",
                .cmds_start     = 0x10140,
-               .ctrl_start     = 0x10680,
+               .ctrl_start     = 0x10440,
+               .cdt            = 0x105e0,
+               .fifo_start     = 0x6000,
+               .fifo_size      = 0x1000,
+               .ptr1_reg       = DMA5_PTR1,
+               .ptr2_reg       = DMA5_PTR2,
+               .cnt1_reg       = DMA5_CNT1,
+               .cnt2_reg       = DMA5_CNT2,
+       },
+       [SRAM_CH07] = {
+               .name           = "ch7",
+               .cmds_start     = 0x0,
+               .ctrl_start     = 0x0,
+               .cdt            = 0x0,
+               .fifo_start     = 0x0,
+               .fifo_size      = 0x0,
+               .ptr1_reg       = DMA6_PTR1,
+               .ptr2_reg       = DMA6_PTR2,
+               .cnt1_reg       = DMA6_CNT1,
+               .cnt2_reg       = DMA6_CNT2,
+       },
+       [SRAM_CH08] = {
+               .name           = "ch8",
+               .cmds_start     = 0x0,
+               .ctrl_start     = 0x0,
+               .cdt            = 0x0,
+               .fifo_start     = 0x0,
+               .fifo_size      = 0x0,
+               .ptr1_reg       = DMA7_PTR1,
+               .ptr2_reg       = DMA7_PTR2,
+               .cnt1_reg       = DMA7_CNT1,
+               .cnt2_reg       = DMA7_CNT2,
+       },
+       [SRAM_CH09] = {
+               .name           = "ch9",
+               .cmds_start     = 0x0,
+               .ctrl_start     = 0x0,
+               .cdt            = 0x0,
+               .fifo_start     = 0x0,
+               .fifo_size      = 0x0,
+               .ptr1_reg       = DMA8_PTR1,
+               .ptr2_reg       = DMA8_PTR2,
+               .cnt1_reg       = DMA8_CNT1,
+               .cnt2_reg       = DMA8_CNT2,
+       },
+};
+
+static struct sram_channel cx23887_sram_channels[] = {
+       [SRAM_CH01] = {
+               .name           = "VID A",
+               .cmds_start     = 0x10000,
+               .ctrl_start     = 0x105b0,
+               .cdt            = 0x107b0,
+               .fifo_start     = 0x40,
+               .fifo_size      = 0x2800,
+               .ptr1_reg       = DMA1_PTR1,
+               .ptr2_reg       = DMA1_PTR2,
+               .cnt1_reg       = DMA1_CNT1,
+               .cnt2_reg       = DMA1_CNT2,
+       },
+       [SRAM_CH02] = {
+               .name           = "ch2",
+               .cmds_start     = 0x0,
+               .ctrl_start     = 0x0,
+               .cdt            = 0x0,
+               .fifo_start     = 0x0,
+               .fifo_size      = 0x0,
+               .ptr1_reg       = DMA2_PTR1,
+               .ptr2_reg       = DMA2_PTR2,
+               .cnt1_reg       = DMA2_CNT1,
+               .cnt2_reg       = DMA2_CNT2,
+       },
+       [SRAM_CH03] = {
+               .name           = "TS1 B",
+               .cmds_start     = 0x100A0,
+               .ctrl_start     = 0x10630,
+               .cdt            = 0x10870,
+               .fifo_start     = 0x5000,
+               .fifo_size      = 0x1000,
+               .ptr1_reg       = DMA3_PTR1,
+               .ptr2_reg       = DMA3_PTR2,
+               .cnt1_reg       = DMA3_CNT1,
+               .cnt2_reg       = DMA3_CNT2,
+       },
+       [SRAM_CH04] = {
+               .name           = "ch4",
+               .cmds_start     = 0x0,
+               .ctrl_start     = 0x0,
+               .cdt            = 0x0,
+               .fifo_start     = 0x0,
+               .fifo_size      = 0x0,
+               .ptr1_reg       = DMA4_PTR1,
+               .ptr2_reg       = DMA4_PTR2,
+               .cnt1_reg       = DMA4_CNT1,
+               .cnt2_reg       = DMA4_CNT2,
+       },
+       [SRAM_CH05] = {
+               .name           = "ch5",
+               .cmds_start     = 0x0,
+               .ctrl_start     = 0x0,
+               .cdt            = 0x0,
+               .fifo_start     = 0x0,
+               .fifo_size      = 0x0,
+               .ptr1_reg       = DMA5_PTR1,
+               .ptr2_reg       = DMA5_PTR2,
+               .cnt1_reg       = DMA5_CNT1,
+               .cnt2_reg       = DMA5_CNT2,
+       },
+       [SRAM_CH06] = {
+               .name           = "TS2 C",
+               .cmds_start     = 0x10140,
+               .ctrl_start     = 0x10670,
                .cdt            = 0x108d0,
                .fifo_start     = 0x6000,
                .fifo_size      = 0x1000,
@@ -461,6 +572,7 @@ static void cx23885_reset(struct cx23885
        cx_write(AUDIO_INT_INT_STAT, 0xffffffff);
        cx_write(AUDIO_EXT_INT_STAT, 0xffffffff);
        cx_write(CLK_DELAY, cx_read(CLK_DELAY) & 0x80000000);
+       cx_write(PAD_CTRL, 0x00500300);
 
        mdelay(100);
 
@@ -626,7 +738,6 @@ static int cx23885_dev_setup(struct cx23
        atomic_inc(&dev->refcount);
 
        dev->nr = cx23885_devcount++;
-       dev->sram_channels = cx23887_sram_channels;
        sprintf(dev->name, "cx23885[%d]", dev->nr);
 
        mutex_lock(&devlist);
@@ -638,11 +749,13 @@ static int cx23885_dev_setup(struct cx23
                dev->bridge = CX23885_BRIDGE_887;
                /* Apply a sensible clock frequency for the PCIe bridge */
                dev->clk_freq = 25000000;
+               dev->sram_channels = cx23887_sram_channels;
        } else
        if(dev->pci->device == 0x8852) {
                dev->bridge = CX23885_BRIDGE_885;
                /* Apply a sensible clock frequency for the PCIe bridge */
                dev->clk_freq = 28000000;
+               dev->sram_channels = cx23885_sram_channels;
        } else
                BUG();
 
@@ -1011,8 +1124,9 @@ static void cx23885_tsport_reg_dump(stru
                port->reg_gpcnt_ctl, cx_read(port->reg_gpcnt_ctl));
        dprintk(1, "%s() dma_ctl(0x%08X)        0x%08x\n", __func__,
                port->reg_dma_ctl, cx_read(port->reg_dma_ctl));
-       dprintk(1, "%s() src_sel(0x%08X)        0x%08x\n", __func__,
-               port->reg_src_sel, cx_read(port->reg_src_sel));
+       if (port->reg_src_sel)
+               dprintk(1, "%s() src_sel(0x%08X)        0x%08x\n", __func__,
+                       port->reg_src_sel, cx_read(port->reg_src_sel));
        dprintk(1, "%s() lngth(0x%08X)          0x%08x\n", __func__,
                port->reg_lngth, cx_read(port->reg_lngth));
        dprintk(1, "%s() hw_sop_ctrl(0x%08X)    0x%08x\n", __func__,
@@ -1043,6 +1157,9 @@ static int cx23885_start_dma(struct cx23
        dprintk(1, "%s() w: %d, h: %d, f: %d\n", __func__,
                buf->vb.width, buf->vb.height, buf->vb.field);
 
+       /* Stop the fifo and risc engine for this port */
+       cx_clear(port->reg_dma_ctl, port->dma_ctl_val);
+
        /* setup fifo + format */
        cx23885_sram_channel_setup(dev,
                                   &dev->sram_channels[ port->sram_chno ],
@@ -1084,7 +1201,21 @@ static int cx23885_start_dma(struct cx23
        cx_write(port->reg_gpcnt_ctl, 3);
        q->count = 1;
 
-       if (cx23885_boards[dev->board].portb & CX23885_MPEG_ENCODER) {
+       /* Set VIDB pins to input */
+       if (cx23885_boards[dev->board].portb == CX23885_MPEG_DVB) {
+               reg = cx_read(PAD_CTRL);
+               reg &= ~0x3; /* Clear TS1_OE & TS1_SOP_OE */
+               cx_write(PAD_CTRL, reg);
+       }
+
+       /* Set VIDC pins to input */
+       if (cx23885_boards[dev->board].portc == CX23885_MPEG_DVB) {
+               reg = cx_read(PAD_CTRL);
+               reg &= ~0x4; /* Clear TS2_SOP_OE */
+               cx_write(PAD_CTRL, reg);
+       }
+
+       if (cx23885_boards[dev->board].portb == CX23885_MPEG_ENCODER) {
 
                reg = cx_read(PAD_CTRL);
                reg = reg & ~0x1;    /* Clear TS1_OE */
@@ -1134,7 +1265,7 @@ static int cx23885_stop_dma(struct cx238
        cx_clear(port->reg_ts_int_msk, port->ts_int_msk_val);
        cx_clear(port->reg_dma_ctl, port->dma_ctl_val);
 
-       if (cx23885_boards[dev->board].portb & CX23885_MPEG_ENCODER) {
+       if (cx23885_boards[dev->board].portb == CX23885_MPEG_ENCODER) {
 
                reg = cx_read(PAD_CTRL);
 


---

Patch is available at: 
http://linuxtv.org/hg/v4l-dvb/rev/fc018c7e7fe378030300b0f56c528d925f865a6b

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