This is an automatic generated email to let you know that the following patch were queued at the http://git.linuxtv.org/media_tree.git tree:
Subject: [media] TVP7002: Changed register values Author: Mats Randgaard <[email protected]> Date: Tue Aug 3 04:18:04 2010 -0300 Register values changed according to the data sheet and Texas Instruments DaVinci_PSP_03_02_00_37. - TVP7002_RGB_COARSE_CLAMP_CTL changed to the default value in data sheet. - TVP7002_HPLL_PHASE_SEL deleted because the registers write to reserved bits. The default value works fine. Signed-off-by: Mats Randgaard <[email protected]> Acked-by: Hans Verkuil <[email protected]> Signed-off-by: Mauro Carvalho Chehab <[email protected]> drivers/media/video/tvp7002.c | 9 +-------- 1 files changed, 1 insertions(+), 8 deletions(-) --- http://git.linuxtv.org/media_tree.git?a=commitdiff;h=425b91c94a8287a9e1463f2ba23170584077ebe6 diff --git a/drivers/media/video/tvp7002.c b/drivers/media/video/tvp7002.c index d78be2f..2e6059a 100644 --- a/drivers/media/video/tvp7002.c +++ b/drivers/media/video/tvp7002.c @@ -128,7 +128,7 @@ static const struct i2c_reg_value tvp7002_init_default[] = { { TVP7002_ADC_SETUP, 0x50, TVP7002_WRITE }, { TVP7002_COARSE_CLAMP_CTL, 0x00, TVP7002_WRITE }, { TVP7002_SOG_CLAMP, 0x80, TVP7002_WRITE }, - { TVP7002_RGB_COARSE_CLAMP_CTL, 0x00, TVP7002_WRITE }, + { TVP7002_RGB_COARSE_CLAMP_CTL, 0x8c, TVP7002_WRITE }, { TVP7002_SOG_COARSE_CLAMP_CTL, 0x04, TVP7002_WRITE }, { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE }, { 0x32, 0x18, TVP7002_RESERVED }, @@ -182,7 +182,6 @@ static const struct i2c_reg_value tvp7002_parms_480P[] = { { TVP7002_HPLL_FDBK_DIV_MSBS, 0x35, TVP7002_WRITE }, { TVP7002_HPLL_FDBK_DIV_LSBS, 0xa0, TVP7002_WRITE }, { TVP7002_HPLL_CRTL, 0x02, TVP7002_WRITE }, - { TVP7002_HPLL_PHASE_SEL, 0x14, TVP7002_WRITE }, { TVP7002_AVID_START_PIXEL_LSBS, 0x91, TVP7002_WRITE }, { TVP7002_AVID_START_PIXEL_MSBS, 0x00, TVP7002_WRITE }, { TVP7002_AVID_STOP_PIXEL_LSBS, 0x0B, TVP7002_WRITE }, @@ -204,7 +203,6 @@ static const struct i2c_reg_value tvp7002_parms_576P[] = { { TVP7002_HPLL_FDBK_DIV_MSBS, 0x36, TVP7002_WRITE }, { TVP7002_HPLL_FDBK_DIV_LSBS, 0x00, TVP7002_WRITE }, { TVP7002_HPLL_CRTL, 0x18, TVP7002_WRITE }, - { TVP7002_HPLL_PHASE_SEL, 0x14, TVP7002_WRITE }, { TVP7002_AVID_START_PIXEL_LSBS, 0x9B, TVP7002_WRITE }, { TVP7002_AVID_START_PIXEL_MSBS, 0x00, TVP7002_WRITE }, { TVP7002_AVID_STOP_PIXEL_LSBS, 0x0F, TVP7002_WRITE }, @@ -226,7 +224,6 @@ static const struct i2c_reg_value tvp7002_parms_1080I60[] = { { TVP7002_HPLL_FDBK_DIV_MSBS, 0x89, TVP7002_WRITE }, { TVP7002_HPLL_FDBK_DIV_LSBS, 0x80, TVP7002_WRITE }, { TVP7002_HPLL_CRTL, 0x98, TVP7002_WRITE }, - { TVP7002_HPLL_PHASE_SEL, 0x14, TVP7002_WRITE }, { TVP7002_AVID_START_PIXEL_LSBS, 0x06, TVP7002_WRITE }, { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE }, { TVP7002_AVID_STOP_PIXEL_LSBS, 0x8a, TVP7002_WRITE }, @@ -248,7 +245,6 @@ static const struct i2c_reg_value tvp7002_parms_1080P60[] = { { TVP7002_HPLL_FDBK_DIV_MSBS, 0x89, TVP7002_WRITE }, { TVP7002_HPLL_FDBK_DIV_LSBS, 0x80, TVP7002_WRITE }, { TVP7002_HPLL_CRTL, 0xE0, TVP7002_WRITE }, - { TVP7002_HPLL_PHASE_SEL, 0x14, TVP7002_WRITE }, { TVP7002_AVID_START_PIXEL_LSBS, 0x06, TVP7002_WRITE }, { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE }, { TVP7002_AVID_STOP_PIXEL_LSBS, 0x8a, TVP7002_WRITE }, @@ -270,7 +266,6 @@ static const struct i2c_reg_value tvp7002_parms_1080I50[] = { { TVP7002_HPLL_FDBK_DIV_MSBS, 0xa5, TVP7002_WRITE }, { TVP7002_HPLL_FDBK_DIV_LSBS, 0x00, TVP7002_WRITE }, { TVP7002_HPLL_CRTL, 0x98, TVP7002_WRITE }, - { TVP7002_HPLL_PHASE_SEL, 0x14, TVP7002_WRITE }, { TVP7002_AVID_START_PIXEL_LSBS, 0x06, TVP7002_WRITE }, { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE }, { TVP7002_AVID_STOP_PIXEL_LSBS, 0x8a, TVP7002_WRITE }, @@ -292,7 +287,6 @@ static const struct i2c_reg_value tvp7002_parms_720P60[] = { { TVP7002_HPLL_FDBK_DIV_MSBS, 0x67, TVP7002_WRITE }, { TVP7002_HPLL_FDBK_DIV_LSBS, 0x20, TVP7002_WRITE }, { TVP7002_HPLL_CRTL, 0xa0, TVP7002_WRITE }, - { TVP7002_HPLL_PHASE_SEL, 0x16, TVP7002_WRITE }, { TVP7002_AVID_START_PIXEL_LSBS, 0x47, TVP7002_WRITE }, { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE }, { TVP7002_AVID_STOP_PIXEL_LSBS, 0x4B, TVP7002_WRITE }, @@ -314,7 +308,6 @@ static const struct i2c_reg_value tvp7002_parms_720P50[] = { { TVP7002_HPLL_FDBK_DIV_MSBS, 0x7b, TVP7002_WRITE }, { TVP7002_HPLL_FDBK_DIV_LSBS, 0xc0, TVP7002_WRITE }, { TVP7002_HPLL_CRTL, 0x98, TVP7002_WRITE }, - { TVP7002_HPLL_PHASE_SEL, 0x16, TVP7002_WRITE }, { TVP7002_AVID_START_PIXEL_LSBS, 0x47, TVP7002_WRITE }, { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE }, { TVP7002_AVID_STOP_PIXEL_LSBS, 0x4B, TVP7002_WRITE }, _______________________________________________ linuxtv-commits mailing list [email protected] http://www.linuxtv.org/cgi-bin/mailman/listinfo/linuxtv-commits
