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Subject: media: platform: rzg2l-cru: rzg2l-ip: Add delay after D-PHY reset Author: Biju Das <biju.das...@bp.renesas.com> Date: Tue Feb 13 18:12:30 2024 +0000 As per section 35.3.1 Starting Reception for the MIPI CSI-2 Input on the latest hardware manual (R01UH0914EJ0140 Rev.1.40) it is mentioned that after DPHY reset, we need to wait for 1 msec or more before start receiving data from the sensor. So add a delay after pre_streamon(). Signed-off-by: Biju Das <biju.das...@bp.renesas.com> Reviewed-by: Laurent Pinchart <laurent.pinchart+rene...@ideasonboard.com> Link: https://lore.kernel.org/r/20240213181233.242316-3-biju.das...@bp.renesas.com Signed-off-by: Laurent Pinchart <laurent.pinch...@ideasonboard.com> Signed-off-by: Hans Verkuil <hverkuil-ci...@xs4all.nl> drivers/media/platform/renesas/rzg2l-cru/rzg2l-ip.c | 3 +++ 1 file changed, 3 insertions(+) --- diff --git a/drivers/media/platform/renesas/rzg2l-cru/rzg2l-ip.c b/drivers/media/platform/renesas/rzg2l-cru/rzg2l-ip.c index 9f351a05893e..8466b4e55909 100644 --- a/drivers/media/platform/renesas/rzg2l-cru/rzg2l-ip.c +++ b/drivers/media/platform/renesas/rzg2l-cru/rzg2l-ip.c @@ -5,6 +5,7 @@ * Copyright (C) 2022 Renesas Electronics Corp. */ +#include <linux/delay.h> #include "rzg2l-cru.h" struct rzg2l_cru_ip_format { @@ -71,6 +72,8 @@ static int rzg2l_cru_ip_s_stream(struct v4l2_subdev *sd, int enable) if (ret) return ret; + fsleep(1000); + ret = rzg2l_cru_start_image_processing(cru); if (ret) { v4l2_subdev_call(cru->ip.remote, video, post_streamoff);
