This is an automatic generated email to let you know that the following patch 
were queued:

Subject: media: chips-media: wave5: support decoding HEVC Main10 profile
Author:  Ivan Bornyakov <brnkv...@gmail.com>
Date:    Mon Apr 15 13:07:19 2024 +0300

Add support for decoding HEVC Main10 profile by scaling the FBC
buffer stride and size by a factor of (bitdepth / 8).

Signed-off-by: Ivan Bornyakov <brnkv...@gmail.com>
Signed-off-by: Sebastian Fricke <sebastian.fri...@collabora.com>
Signed-off-by: Hans Verkuil <hverkuil-ci...@xs4all.nl>

 .../platform/chips-media/wave5/wave5-vpu-dec.c     | 30 ++++++++++++----------
 .../platform/chips-media/wave5/wave5-vpuapi.h      |  1 +
 2 files changed, 18 insertions(+), 13 deletions(-)

---

diff --git a/drivers/media/platform/chips-media/wave5/wave5-vpu-dec.c 
b/drivers/media/platform/chips-media/wave5/wave5-vpu-dec.c
index c8624c681fa6..8e1dab9434ca 100644
--- a/drivers/media/platform/chips-media/wave5/wave5-vpu-dec.c
+++ b/drivers/media/platform/chips-media/wave5/wave5-vpu-dec.c
@@ -1055,6 +1055,22 @@ static int wave5_prepare_fb(struct vpu_instance *inst)
        int ret, i;
        struct v4l2_m2m_buffer *buf, *n;
        struct v4l2_m2m_ctx *m2m_ctx = inst->v4l2_fh.m2m_ctx;
+       u32 bitdepth = inst->codec_info->dec_info.initial_info.luma_bitdepth;
+
+       switch (bitdepth) {
+       case 8:
+               break;
+       case 10:
+               if (inst->std == W_HEVC_DEC &&
+                   inst->dev->attr.support_hevc10bit_dec)
+                       break;
+
+               fallthrough;
+       default:
+               dev_err(inst->dev->dev, "no support for %d bit depth\n", 
bitdepth);
+
+               return -EINVAL;
+       }
 
        linear_num = v4l2_m2m_num_dst_bufs_ready(m2m_ctx);
        non_linear_num = inst->fbc_buf_count;
@@ -1063,7 +1079,7 @@ static int wave5_prepare_fb(struct vpu_instance *inst)
                struct frame_buffer *frame = &inst->frame_buf[i];
                struct vpu_buf *vframe = &inst->frame_vbuf[i];
 
-               fb_stride = inst->dst_fmt.width;
+               fb_stride = ALIGN(inst->dst_fmt.width * bitdepth / 8, 32);
                fb_height = ALIGN(inst->dst_fmt.height, 32);
                luma_size = fb_stride * fb_height;
 
@@ -1408,22 +1424,10 @@ static int wave5_vpu_dec_start_streaming(struct 
vb2_queue *q, unsigned int count
                if (ret)
                        goto free_bitstream_vbuf;
        } else if (q->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
-               struct dec_initial_info *initial_info =
-                       &inst->codec_info->dec_info.initial_info;
-
                if (inst->state == VPU_INST_STATE_STOP)
                        ret = switch_state(inst, VPU_INST_STATE_INIT_SEQ);
                if (ret)
                        goto return_buffers;
-
-               if (inst->state == VPU_INST_STATE_INIT_SEQ) {
-                       if (initial_info->luma_bitdepth != 8) {
-                               dev_info(inst->dev->dev, "%s: no support for %d 
bit depth",
-                                        __func__, initial_info->luma_bitdepth);
-                               ret = -EINVAL;
-                               goto return_buffers;
-                       }
-               }
        }
 
        return ret;
diff --git a/drivers/media/platform/chips-media/wave5/wave5-vpuapi.h 
b/drivers/media/platform/chips-media/wave5/wave5-vpuapi.h
index edc50450ddb8..fa4dc53949e6 100644
--- a/drivers/media/platform/chips-media/wave5/wave5-vpuapi.h
+++ b/drivers/media/platform/chips-media/wave5/wave5-vpuapi.h
@@ -327,6 +327,7 @@ struct vpu_attr {
        u32 support_backbone: 1;
        u32 support_avc10bit_enc: 1;
        u32 support_hevc10bit_enc: 1;
+       u32 support_hevc10bit_dec: 1;
        u32 support_vcore_backbone: 1;
        u32 support_vcpu_backbone: 1;
 };

Reply via email to