On Fri May 2 23:41:41 2025 +0300, Vladimir Zapolskiy wrote:
> Since CSIPHY IP on modern Qualcomm SoCs supports D-PHY and C-PHY
> interfaces, it might be necessary to specify it explicitly for some
> particular devices.
>
> Signed-off-by: Vladimir Zapolskiy <vladimir.zapols...@linaro.org>
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlow...@linaro.org>
> Reviewed-by: Bryan O'Donoghue <bryan.odonog...@linaro.org>
> Signed-off-by: Bryan O'Donoghue <b...@kernel.org>
> Signed-off-by: Hans Verkuil <hverk...@xs4all.nl>
Patch committed.
Thanks,
Hans Verkuil
Documentation/devicetree/bindings/media/qcom,x1e80100-camss.yaml | 5 +++++
1 file changed, 5 insertions(+)
---
diff --git a/Documentation/devicetree/bindings/media/qcom,x1e80100-camss.yaml
b/Documentation/devicetree/bindings/media/qcom,x1e80100-camss.yaml
index 680f3f514132..2e7455bd75ec 100644
--- a/Documentation/devicetree/bindings/media/qcom,x1e80100-camss.yaml
+++ b/Documentation/devicetree/bindings/media/qcom,x1e80100-camss.yaml
@@ -153,6 +153,11 @@ properties:
minItems: 1
maxItems: 4
+ bus-type:
+ enum:
+ - 1 # MEDIA_BUS_TYPE_CSI2_CPHY
+ - 4 # MEDIA_BUS_TYPE_CSI2_DPHY
+
required:
- clock-lanes
- data-lanes
