On Tue Dec 30 18:09:16 2025 +0100, Tommaso Merciai wrote:
> On RZ/G3E the CRU driver relies on the frame end interrupt to detect the
> completion of an active frame transfer when stopping DMA.
>
> Update the driver to enable only frame end interrupts (CRUnIE2_FExE),
> dropping the usage of the frame start interrupts, which is not required
> for this operations flow.
>
> Fix the interrupt status handling in the DMA stopping state by checking
> the correct frame end status bits (FExS) instead of the frame start one
> (FSxS). Add a dedicated CRUnINTS2_FExS() macro to reflect the actual
> register bit layout and drop the now unused CRUnIE2_FSxE() and
> CRUnINTS2_FSxS() macros.
>
> This ensures that DMA stopping is triggered by the intended frame end
> events and avoids incorrect interrupt handling.
>
> Signed-off-by: Tommaso Merciai <[email protected]>
> Signed-off-by: Jacopo Mondi <[email protected]>
> Reviewed-by: Lad Prabhakar <[email protected]>
> Signed-off-by: Hans Verkuil <[email protected]>
Patch committed.
Thanks,
Hans Verkuil
drivers/media/platform/renesas/rzg2l-cru/rzg2l-cru-regs.h | 3 +--
drivers/media/platform/renesas/rzg2l-cru/rzg2l-video.c | 9 ++++-----
2 files changed, 5 insertions(+), 7 deletions(-)
---
diff --git a/drivers/media/platform/renesas/rzg2l-cru/rzg2l-cru-regs.h
b/drivers/media/platform/renesas/rzg2l-cru/rzg2l-cru-regs.h
index 10e62f2646d0..23cb50ee8e57 100644
--- a/drivers/media/platform/renesas/rzg2l-cru/rzg2l-cru-regs.h
+++ b/drivers/media/platform/renesas/rzg2l-cru/rzg2l-cru-regs.h
@@ -14,12 +14,11 @@
#define CRUnIE_EFE BIT(17)
-#define CRUnIE2_FSxE(x) BIT(((x) * 3))
#define CRUnIE2_FExE(x) BIT(((x) * 3) + 1)
#define CRUnINTS_SFS BIT(16)
-#define CRUnINTS2_FSxS(x) BIT(((x) * 3))
+#define CRUnINTS2_FExS(x) BIT(((x) * 3) + 1)
#define CRUnRST_VRESETN BIT(0)
diff --git a/drivers/media/platform/renesas/rzg2l-cru/rzg2l-video.c
b/drivers/media/platform/renesas/rzg2l-cru/rzg2l-video.c
index 6aea7c244df1..98b6afbc708d 100644
--- a/drivers/media/platform/renesas/rzg2l-cru/rzg2l-video.c
+++ b/drivers/media/platform/renesas/rzg2l-cru/rzg2l-video.c
@@ -440,7 +440,6 @@ static int rzg2l_cru_get_virtual_channel(struct
rzg2l_cru_dev *cru)
void rzg3e_cru_enable_interrupts(struct rzg2l_cru_dev *cru)
{
- rzg2l_cru_write(cru, CRUnIE2, CRUnIE2_FSxE(cru->svc_channel));
rzg2l_cru_write(cru, CRUnIE2, CRUnIE2_FExE(cru->svc_channel));
}
@@ -700,10 +699,10 @@ irqreturn_t rzg3e_cru_irq(int irq, void *data)
}
if (cru->state == RZG2L_CRU_DMA_STOPPING) {
- if (irq_status & CRUnINTS2_FSxS(0) ||
- irq_status & CRUnINTS2_FSxS(1) ||
- irq_status & CRUnINTS2_FSxS(2) ||
- irq_status & CRUnINTS2_FSxS(3))
+ if (irq_status & CRUnINTS2_FExS(0) ||
+ irq_status & CRUnINTS2_FExS(1) ||
+ irq_status & CRUnINTS2_FExS(2) ||
+ irq_status & CRUnINTS2_FExS(3))
dev_dbg(cru->dev, "IRQ while state stopping\n");
return IRQ_HANDLED;
}
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