On Fri May 29 15:35:00 2026 +0800, Wangao Wang wrote:
> Introduce platform data for X1P42100, derived from SM8550 but using a
> different clock configuration and a dedicated OPP setup.
>
> Reviewed-by: Vikash Garodia <[email protected]>
> Signed-off-by: Wangao Wang <[email protected]>
> Signed-off-by: Bryan O'Donoghue <[email protected]>
Patch committed.
Thanks,
Bryan O'Donoghue
.../platform/qcom/iris/iris_platform_common.h | 1 +
.../media/platform/qcom/iris/iris_platform_vpu3x.c | 42 ++++++++++++++++++++++
.../platform/qcom/iris/iris_platform_x1p42100.h | 22 ++++++++++++
drivers/media/platform/qcom/iris/iris_probe.c | 4 +++
4 files changed, 69 insertions(+)
---
diff --git a/drivers/media/platform/qcom/iris/iris_platform_common.h
b/drivers/media/platform/qcom/iris/iris_platform_common.h
index c522dd0a528b..982767faa51c 100644
--- a/drivers/media/platform/qcom/iris/iris_platform_common.h
+++ b/drivers/media/platform/qcom/iris/iris_platform_common.h
@@ -58,6 +58,7 @@ extern const struct iris_platform_data sm8250_data;
extern const struct iris_platform_data sm8550_data;
extern const struct iris_platform_data sm8650_data;
extern const struct iris_platform_data sm8750_data;
+extern const struct iris_platform_data x1p42100_data;
enum platform_clk_type {
IRIS_AXI_CLK, /* AXI0 in case of platforms with multiple AXI clocks */
diff --git a/drivers/media/platform/qcom/iris/iris_platform_vpu3x.c
b/drivers/media/platform/qcom/iris/iris_platform_vpu3x.c
index c249ff827541..541ddc40e3ae 100644
--- a/drivers/media/platform/qcom/iris/iris_platform_vpu3x.c
+++ b/drivers/media/platform/qcom/iris/iris_platform_vpu3x.c
@@ -16,6 +16,7 @@
#include "iris_platform_sm8550.h"
#include "iris_platform_sm8650.h"
#include "iris_platform_sm8750.h"
+#include "iris_platform_x1p42100.h"
static const struct iris_firmware_desc iris_vpu30_p4_s6_gen2_desc = {
.firmware_data = &iris_hfi_gen2_data,
@@ -29,6 +30,12 @@ static const struct iris_firmware_desc
iris_vpu30_p4_gen2_desc = {
.fwname = "qcom/vpu/vpu30_p4.mbn",
};
+static const struct iris_firmware_desc iris_vpu30_p1_gen2_desc = {
+ .firmware_data = &iris_hfi_gen2_data,
+ .get_vpu_buffer_size = iris_vpu_buf_size,
+ .fwname = "qcom/vpu/vpu30_p1_s7.mbn",
+};
+
static const struct iris_firmware_desc iris_vpu33_p4_gen2_desc = {
.firmware_data = &iris_hfi_gen2_data,
.get_vpu_buffer_size = iris_vpu33_buf_size,
@@ -217,3 +224,38 @@ const struct iris_platform_data sm8750_data = {
.max_core_mbpf = NUM_MBS_8K * 2,
.max_core_mbps = ((7680 * 4320) / 256) * 60,
};
+
+/*
+ * Shares most of SM8550 data except:
+ * - clk_tbl and opp_clk_tbl for x1p42100
+ * - different firmware
+ * - different num_vpp_pipe
+ */
+const struct iris_platform_data x1p42100_data = {
+ .firmware_desc = &iris_vpu30_p1_gen2_desc,
+ .vpu_ops = &iris_vpu3_ops,
+ .icc_tbl = iris_icc_info_vpu3x,
+ .icc_tbl_size = ARRAY_SIZE(iris_icc_info_vpu3x),
+ .clk_rst_tbl = sm8550_clk_reset_table,
+ .clk_rst_tbl_size = ARRAY_SIZE(sm8550_clk_reset_table),
+ .bw_tbl_dec = iris_bw_table_dec_vpu3x,
+ .bw_tbl_dec_size = ARRAY_SIZE(iris_bw_table_dec_vpu3x),
+ .pmdomain_tbl = iris_pmdomain_table_vpu3x,
+ .pmdomain_tbl_size = ARRAY_SIZE(iris_pmdomain_table_vpu3x),
+ .opp_pd_tbl = iris_opp_pd_table_vpu3x,
+ .opp_pd_tbl_size = ARRAY_SIZE(iris_opp_pd_table_vpu3x),
+ .clk_tbl = x1p42100_clk_table,
+ .clk_tbl_size = ARRAY_SIZE(x1p42100_clk_table),
+ .opp_clk_tbl = x1p42100_opp_clk_table,
+ /* Upper bound of DMA address range */
+ .dma_mask = 0xe0000000 - 1,
+ .inst_iris_fmts = iris_fmts_vpu3x_dec,
+ .inst_iris_fmts_size = ARRAY_SIZE(iris_fmts_vpu3x_dec),
+ .inst_caps = &platform_inst_cap_sm8550,
+ .tz_cp_config_data = tz_cp_config_vpu3,
+ .tz_cp_config_data_size = ARRAY_SIZE(tz_cp_config_vpu3),
+ .num_vpp_pipe = 1,
+ .max_session_count = 16,
+ .max_core_mbpf = NUM_MBS_8K * 2,
+ .max_core_mbps = ((7680 * 4320) / 256) * 60,
+};
diff --git a/drivers/media/platform/qcom/iris/iris_platform_x1p42100.h
b/drivers/media/platform/qcom/iris/iris_platform_x1p42100.h
new file mode 100644
index 000000000000..d89acfbc1233
--- /dev/null
+++ b/drivers/media/platform/qcom/iris/iris_platform_x1p42100.h
@@ -0,0 +1,22 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
+ */
+
+#ifndef __IRIS_PLATFORM_X1P42100_H__
+#define __IRIS_PLATFORM_X1P42100_H__
+
+static const struct platform_clk_data x1p42100_clk_table[] = {
+ {IRIS_AXI_CLK, "iface" },
+ {IRIS_CTRL_CLK, "core" },
+ {IRIS_HW_CLK, "vcodec0_core" },
+ {IRIS_BSE_HW_CLK, "vcodec0_bse" },
+};
+
+static const char *const x1p42100_opp_clk_table[] = {
+ "vcodec0_core",
+ "vcodec0_bse",
+ NULL,
+};
+
+#endif
diff --git a/drivers/media/platform/qcom/iris/iris_probe.c
b/drivers/media/platform/qcom/iris/iris_probe.c
index a755a6f73ea6..a53423399854 100644
--- a/drivers/media/platform/qcom/iris/iris_probe.c
+++ b/drivers/media/platform/qcom/iris/iris_probe.c
@@ -385,6 +385,10 @@ static const struct of_device_id iris_dt_match[] = {
.compatible = "qcom,sm8750-iris",
.data = &sm8750_data,
},
+ {
+ .compatible = "qcom,x1p42100-iris",
+ .data = &x1p42100_data,
+ },
{ },
};
MODULE_DEVICE_TABLE(of, iris_dt_match);
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