On Tue Apr 14 20:52:00 2026 +0200, Loic Poulain wrote:
> Add PIX path support to the CSID-340 driver. The hardware exposes a
> dedicated PIX interface in addition to the existing RDI paths, but
> the driver only supported RDI stream configuration so far.
>
> The PIX path is configured similarly to RDI but requires decode-format
> to be specified.
>
> The PIX pipeline can subsequently perform further processing,
> including scaling, cropping, and statistics.
>
> Signed-off-by: Loic Poulain <[email protected]>
> Reviewed-by: Bryan O'Donoghue <[email protected]>
> Signed-off-by: Bryan O'Donoghue <[email protected]>
Patch committed.
Thanks,
Bryan O'Donoghue
drivers/media/platform/qcom/camss/camss-csid-340.c | 27 ++++++++++++----------
1 file changed, 15 insertions(+), 12 deletions(-)
---
diff --git a/drivers/media/platform/qcom/camss/camss-csid-340.c
b/drivers/media/platform/qcom/camss/camss-csid-340.c
index 183d40d59afb..eca3f07b8a8a 100644
--- a/drivers/media/platform/qcom/camss/camss-csid-340.c
+++ b/drivers/media/platform/qcom/camss/camss-csid-340.c
@@ -55,8 +55,6 @@
#define CSID_CTRL_HALT_AT_FRAME_BOUNDARY 0
#define CSID_CTRL_RESUME_AT_FRAME_BOUNDARY 1
-#define CSID_MAX_RDI_SRC_STREAMS (MSM_CSID_MAX_SRC_STREAMS - 1)
-
enum csid_iface {
CSID_IFACE_PIX,
CSID_IFACE_RDI0,
@@ -64,10 +62,11 @@ enum csid_iface {
CSID_IFACE_RDI2,
};
-static enum csid_iface csid_port_iface_map[CSID_MAX_RDI_SRC_STREAMS] = {
+static enum csid_iface csid_port_iface_map[MSM_CSID_MAX_SRC_STREAMS] = {
[0] = CSID_IFACE_RDI0,
[1] = CSID_IFACE_RDI1,
[2] = CSID_IFACE_RDI2,
+ [3] = CSID_IFACE_PIX,
};
static void __csid_configure_rx(struct csid_device *csid, struct
csid_phy_config *phy)
@@ -84,13 +83,14 @@ static void __csid_configure_rx(struct csid_device *csid,
struct csid_phy_config
writel_relaxed(val, csid->base + CSID_CSI2_RX_CFG1);
}
-static void __csid_configure_rdi_stream(struct csid_device *csid, u8 enable,
u8 port, u8 vc)
+static void __csid_configure_stream(struct csid_device *csid, u8 enable, u8
port, u8 vc)
{
struct v4l2_mbus_framefmt *input_format =
&csid->fmt[MSM_CSID_PAD_FIRST_SRC + port];
const struct csid_format_info *format =
csid_get_fmt_entry(csid->res->formats->formats,
csid->res->formats->nformats,
input_format->code);
enum csid_iface iface = csid_port_iface_map[port];
+
u8 dt_id;
u32 val;
@@ -108,7 +108,11 @@ static void __csid_configure_rdi_stream(struct csid_device
*csid, u8 enable, u8
*/
dt_id = port & 0x03;
- val = CSID_CFG0_DECODE_FORMAT_NOP; /* only for RDI path */
+ if (iface == CSID_IFACE_PIX)
+ val = FIELD_PREP(CSID_CFG0_DECODE_FORMAT_MASK,
format->decode_format);
+ else /* RDI is raw, no decoding */
+ val = CSID_CFG0_DECODE_FORMAT_NOP;
+
val |= FIELD_PREP(CSID_CFG0_DT_MASK, format->data_type);
val |= FIELD_PREP(CSID_CFG0_VC_MASK, vc);
val |= FIELD_PREP(CSID_CFG0_DTID_MASK, dt_id);
@@ -116,24 +120,23 @@ static void __csid_configure_rdi_stream(struct
csid_device *csid, u8 enable, u8
if (enable)
val |= CSID_CFG0_ENABLE;
- dev_dbg(csid->camss->dev, "CSID%u: Stream %s (dt:0x%x port=%u vc=%u)\n",
+ dev_dbg(csid->camss->dev, "CSID%u: Stream %s (dt:0x%x df=0x%x port=%u
vc=%u)\n",
csid->id, enable ? "enable" : "disable", format->data_type,
- port, vc);
+ format->decode_format, port, vc);
writel_relaxed(val, csid->base + CSID_CFG0(iface));
writel_relaxed(enable, csid->base + CSID_CTRL(iface));
}
-static void csid_configure_stream(struct csid_device *csid, u8 enable)
+static void csid_configure_streams(struct csid_device *csid, u8 enable)
{
int i;
__csid_configure_rx(csid, &csid->phy);
- /* RDIs */
- for (i = 0; i < CSID_MAX_RDI_SRC_STREAMS; i++) {
+ for (i = 0; i < MSM_CSID_MAX_SRC_STREAMS; i++) {
if (csid->phy.en_vc & BIT(i))
- __csid_configure_rdi_stream(csid, !!enable, i, 0);
+ __csid_configure_stream(csid, !!enable, i, 0);
}
}
@@ -189,7 +192,7 @@ static void csid_subdev_init(struct csid_device *csid) {}
const struct csid_hw_ops csid_ops_340 = {
.configure_testgen_pattern = csid_configure_testgen_pattern,
- .configure_stream = csid_configure_stream,
+ .configure_stream = csid_configure_streams,
.hw_version = csid_hw_version,
.isr = csid_isr,
.reset = csid_reset,
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