On Fri Sep 18 14:56:41 2026 +0100, Bryan O'Donoghue wrote:
> Introducing a dedicated CSIPHY driver community feedback was both to move
> to data-lanes starting at index 1 on the PHY side and also to match that
> indexing scheme in the CSI decoder - CSID.
>
> CSID consumes the data-lanes property to determine which CSID lanes to
> switch on. For indexes starting at 1 we need to amend the logic somewhere.
> The PHY side code normalises the input data to register level meanings so,
> replicate that logic on the CSID side.
>
> Introduce a simple flag to differentiate between legacy indexing @ 0 and
> new indexing @ 1.
>
> Existing bindings are not affected.
>
> Reviewed-by: Loic Poulain <[email protected]>
> Tested-by: Oleg Keri <[email protected]> # Lenovo Yoga Slim 7x Gen 11 (Glymur)
> Signed-off-by: Bryan O'Donoghue <[email protected]>
> Signed-off-by: Bryan O'Donoghue <[email protected]>
Patch committed.
Thanks,
Bryan O'Donoghue
drivers/media/platform/qcom/camss/camss-csiphy.h | 1 +
drivers/media/platform/qcom/camss/camss.c | 15 ++++++++++++---
2 files changed, 13 insertions(+), 3 deletions(-)
---
diff --git a/drivers/media/platform/qcom/camss/camss-csiphy.h
b/drivers/media/platform/qcom/camss/camss-csiphy.h
index 7a357044b9fd..8c3319f2ca1c 100644
--- a/drivers/media/platform/qcom/camss/camss-csiphy.h
+++ b/drivers/media/platform/qcom/camss/camss-csiphy.h
@@ -21,6 +21,7 @@
#define MSM_CSIPHY_PAD_SINK 0
#define MSM_CSIPHY_PAD_SRC 1
#define MSM_CSIPHY_PADS_NUM 2
+#define MSM_CSIPHY_MAX_DATA_LANE 4
#define CSIPHY_GRP_ID 1
diff --git a/drivers/media/platform/qcom/camss/camss.c
b/drivers/media/platform/qcom/camss/camss.c
index bf116b278dd4..3f8b651b91e9 100644
--- a/drivers/media/platform/qcom/camss/camss.c
+++ b/drivers/media/platform/qcom/camss/camss.c
@@ -4760,7 +4760,8 @@ static const struct parent_dev_ops vfe_parent_dev_ops = {
*/
static int camss_parse_endpoint_node(struct device *dev,
struct fwnode_handle *ep,
- struct camss_async_subdev *csd)
+ struct camss_async_subdev *csd,
+ u8 lane_base)
{
struct csiphy_lanes_cfg *lncfg = &csd->interface.csi2.lane_cfg;
struct v4l2_mbus_config_mipi_csi2 *mipi_csi2;
@@ -4795,7 +4796,14 @@ static int camss_parse_endpoint_node(struct device *dev,
return -ENOMEM;
for (i = 0; i < lncfg->num_data; i++) {
- lncfg->data[i].pos = mipi_csi2->data_lanes[i];
+ u8 lane = mipi_csi2->data_lanes[i];
+
+ if (lane < lane_base || lane - lane_base >=
MSM_CSIPHY_MAX_DATA_LANE) {
+ dev_err(dev, "invalid data-lane %u\n", lane);
+ return -EINVAL;
+ }
+
+ lncfg->data[i].pos = mipi_csi2->data_lanes[i] - lane_base;
lncfg->data[i].pol = mipi_csi2->lane_polarities[i + 1];
}
@@ -4812,6 +4820,7 @@ static int camss_parse_ports(struct camss *camss)
{
struct device *dev = camss->dev;
struct fwnode_handle *fwnode = dev_fwnode(dev);
+ u8 lane_base = camss->legacy_phy ? 0 : 1;
int ret;
fwnode_graph_for_each_endpoint_scoped(fwnode, ep) {
@@ -4853,7 +4862,7 @@ static int camss_parse_ports(struct camss *camss)
if (IS_ERR(csd))
return PTR_ERR(csd);
- ret = camss_parse_endpoint_node(dev, ep, csd);
+ ret = camss_parse_endpoint_node(dev, ep, csd, lane_base);
if (ret < 0)
return ret;
}
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