Author: jmolenda
Date: Fri Sep 27 18:29:10 2013
New Revision: 191588
URL: http://llvm.org/viewvc/llvm-project?rev=191588&view=rev
Log:
Mark armv6m as "compatible" with armv7 - that's the
closest ISA. armv6 wouldn't have the handful of
T32 instructions that the Cortex-M0 ISA specifies.
<rdar://problem/15099306>
Modified:
lldb/trunk/source/Core/ArchSpec.cpp
Modified: lldb/trunk/source/Core/ArchSpec.cpp
URL:
http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Core/ArchSpec.cpp?rev=191588&r1=191587&r2=191588&view=diff
==============================================================================
--- lldb/trunk/source/Core/ArchSpec.cpp (original)
+++ lldb/trunk/source/Core/ArchSpec.cpp Fri Sep 27 18:29:10 2013
@@ -889,7 +889,7 @@ cores_match (const ArchSpec::Core core1,
if (!enforce_exact_match)
{
try_inverse = false;
- if (core2 == ArchSpec::eCore_arm_armv6)
+ if (core2 == ArchSpec::eCore_arm_armv7)
return true;
}
break;
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