Author: emaste
Date: Thu Oct 10 14:17:07 2013
New Revision: 192388
URL: http://llvm.org/viewvc/llvm-project?rev=192388&view=rev
Log:
Update comment (MIPS also has 32-bit opcodes)
Modified:
lldb/trunk/source/Core/Disassembler.cpp
Modified: lldb/trunk/source/Core/Disassembler.cpp
URL:
http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Core/Disassembler.cpp?rev=192388&r1=192387&r2=192388&view=diff
==============================================================================
--- lldb/trunk/source/Core/Disassembler.cpp (original)
+++ lldb/trunk/source/Core/Disassembler.cpp Thu Oct 10 14:17:07 2013
@@ -611,8 +611,8 @@ Instruction::Dump (lldb_private::Stream
}
else
{
- // Else, we have ARM which can show up to a uint32_t 0x00000000
(10 spaces)
- // plus two for padding...
+ // Else, we have ARM or MIPS which can show up to a uint32_t
+ // 0x00000000 (10 spaces) plus two for padding...
if (max_opcode_byte_size > 0)
m_opcode.Dump (&ss, max_opcode_byte_size * 3 + 1);
else
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