[Lldb-commits] [PATCH] lldb handle breakpoints on ARM64

[Paul Osmialowski]

The opcode was taken from gdb sources.

break set -n main
Breakpoint 1: where = example`$x, address = 0x0000000000400c60

Note that for me, gdb worked only with statically linked binaries on emulated 
AArch64 machine, therefore from now on I'm testing lldb with statically linked 
binaries too.

Still much work must be done in order to provide full AArch64 support.

http://reviews.llvm.org/D4969

Files:
  source/Plugins/Platform/Linux/PlatformLinux.cpp
  source/Plugins/Process/Linux/NativeProcessLinux.cpp

Index: source/Plugins/Platform/Linux/PlatformLinux.cpp
===================================================================
--- source/Plugins/Platform/Linux/PlatformLinux.cpp
+++ source/Plugins/Platform/Linux/PlatformLinux.cpp
@@ -422,6 +422,13 @@
         assert(false && "CPU type not supported!");
         break;
             
+    case llvm::Triple::aarch64:
+        {
+            static const uint8_t g_aarch64_opcode[] = { 0x00, 0x00, 0x20, 0xd4 
};
+            trap_opcode = g_aarch64_opcode;
+            trap_opcode_size = sizeof g_aarch64_opcode;
+        }
+        break;
     case llvm::Triple::x86:
     case llvm::Triple::x86_64:
         {
Index: source/Plugins/Process/Linux/NativeProcessLinux.cpp
===================================================================
--- source/Plugins/Process/Linux/NativeProcessLinux.cpp
+++ source/Plugins/Process/Linux/NativeProcessLinux.cpp
@@ -2883,10 +2883,15 @@
 {
     // FIXME put this behind a breakpoint protocol class that can be
     // set per architecture.  Need ARM, MIPS support here.
+    static const uint8_t g_aarch64_opcode[] = { 0x00, 0x00, 0x20, 0xd4 };
     static const uint8_t g_i386_opcode [] = { 0xCC };
 
     switch (m_arch.GetMachine ())
     {
+        case llvm::Triple::aarch64:
+            actual_opcode_size = static_cast<uint32_t> (sizeof 
g_aarch64_opcode);
+            return Error ();
+
         case llvm::Triple::x86:
         case llvm::Triple::x86_64:
             actual_opcode_size = static_cast<uint32_t> (sizeof(g_i386_opcode));
@@ -2912,10 +2917,16 @@
 {
     // FIXME put this behind a breakpoint protocol class that can be
     // set per architecture.  Need ARM, MIPS support here.
+    static const uint8_t g_aarch64_opcode[] = { 0x00, 0x00, 0x20, 0xd4 };
     static const uint8_t g_i386_opcode [] = { 0xCC };
 
     switch (m_arch.GetMachine ())
     {
+    case llvm::Triple::aarch64:
+        trap_opcode_bytes = g_aarch64_opcode;
+        actual_opcode_size = sizeof g_aarch64_opcode;
+        return Error ();
+
     case llvm::Triple::x86:
     case llvm::Triple::x86_64:
         trap_opcode_bytes = g_i386_opcode;

Index: source/Plugins/Platform/Linux/PlatformLinux.cpp
===================================================================
--- source/Plugins/Platform/Linux/PlatformLinux.cpp
+++ source/Plugins/Platform/Linux/PlatformLinux.cpp
@@ -422,6 +422,13 @@
         assert(false && "CPU type not supported!");
         break;
             
+    case llvm::Triple::aarch64:
+        {
+            static const uint8_t g_aarch64_opcode[] = { 0x00, 0x00, 0x20, 0xd4 };
+            trap_opcode = g_aarch64_opcode;
+            trap_opcode_size = sizeof g_aarch64_opcode;
+        }
+        break;
     case llvm::Triple::x86:
     case llvm::Triple::x86_64:
         {
Index: source/Plugins/Process/Linux/NativeProcessLinux.cpp
===================================================================
--- source/Plugins/Process/Linux/NativeProcessLinux.cpp
+++ source/Plugins/Process/Linux/NativeProcessLinux.cpp
@@ -2883,10 +2883,15 @@
 {
     // FIXME put this behind a breakpoint protocol class that can be
     // set per architecture.  Need ARM, MIPS support here.
+    static const uint8_t g_aarch64_opcode[] = { 0x00, 0x00, 0x20, 0xd4 };
     static const uint8_t g_i386_opcode [] = { 0xCC };
 
     switch (m_arch.GetMachine ())
     {
+        case llvm::Triple::aarch64:
+            actual_opcode_size = static_cast<uint32_t> (sizeof g_aarch64_opcode);
+            return Error ();
+
         case llvm::Triple::x86:
         case llvm::Triple::x86_64:
             actual_opcode_size = static_cast<uint32_t> (sizeof(g_i386_opcode));
@@ -2912,10 +2917,16 @@
 {
     // FIXME put this behind a breakpoint protocol class that can be
     // set per architecture.  Need ARM, MIPS support here.
+    static const uint8_t g_aarch64_opcode[] = { 0x00, 0x00, 0x20, 0xd4 };
     static const uint8_t g_i386_opcode [] = { 0xCC };
 
     switch (m_arch.GetMachine ())
     {
+    case llvm::Triple::aarch64:
+        trap_opcode_bytes = g_aarch64_opcode;
+        actual_opcode_size = sizeof g_aarch64_opcode;
+        return Error ();
+
     case llvm::Triple::x86:
     case llvm::Triple::x86_64:
         trap_opcode_bytes = g_i386_opcode;

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