Author: tfiala Date: Thu Aug 28 09:32:43 2014 New Revision: 216668 URL: http://llvm.org/viewvc/llvm-project?rev=216668&view=rev Log: lldb - towards AArch64 being recognised as platform architecture
See http://reviews.llvm.org/D4381. Change by Paul Osmialowski. Modified: lldb/trunk/include/lldb/Core/ArchSpec.h lldb/trunk/source/Core/ArchSpec.cpp Modified: lldb/trunk/include/lldb/Core/ArchSpec.h URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/include/lldb/Core/ArchSpec.h?rev=216668&r1=216667&r2=216668&view=diff ============================================================================== --- lldb/trunk/include/lldb/Core/ArchSpec.h (original) +++ lldb/trunk/include/lldb/Core/ArchSpec.h Thu Aug 28 09:32:43 2014 @@ -64,6 +64,8 @@ public: eCore_thumbv7m, eCore_thumbv7em, eCore_arm_arm64, + eCore_arm_armv8, + eCore_arm_aarch64, eCore_mips64, Modified: lldb/trunk/source/Core/ArchSpec.cpp URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Core/ArchSpec.cpp?rev=216668&r1=216667&r2=216668&view=diff ============================================================================== --- lldb/trunk/source/Core/ArchSpec.cpp (original) +++ lldb/trunk/source/Core/ArchSpec.cpp Thu Aug 28 09:32:43 2014 @@ -79,6 +79,8 @@ static const CoreDefinition g_core_defin { eByteOrderLittle, 4, 2, 4, llvm::Triple::thumb , ArchSpec::eCore_thumbv7m , "thumbv7m" }, { eByteOrderLittle, 4, 2, 4, llvm::Triple::thumb , ArchSpec::eCore_thumbv7em , "thumbv7em" }, { eByteOrderLittle, 8, 4, 4, llvm::Triple::aarch64, ArchSpec::eCore_arm_arm64 , "arm64" }, + { eByteOrderLittle, 8, 4, 4, llvm::Triple::aarch64, ArchSpec::eCore_arm_armv8 , "armv8" }, + { eByteOrderLittle, 8, 4, 4, llvm::Triple::aarch64, ArchSpec::eCore_arm_aarch64 , "aarch64" }, { eByteOrderBig , 8, 4, 4, llvm::Triple::mips64 , ArchSpec::eCore_mips64 , "mips64" }, @@ -257,6 +259,7 @@ static const ArchDefinitionEntry g_elf_a { ArchSpec::eCore_ppc_generic , llvm::ELF::EM_PPC , LLDB_INVALID_CPUTYPE, 0xFFFFFFFFu, 0xFFFFFFFFu }, // PowerPC { ArchSpec::eCore_ppc64_generic , llvm::ELF::EM_PPC64 , LLDB_INVALID_CPUTYPE, 0xFFFFFFFFu, 0xFFFFFFFFu }, // PowerPC64 { ArchSpec::eCore_arm_generic , llvm::ELF::EM_ARM , LLDB_INVALID_CPUTYPE, 0xFFFFFFFFu, 0xFFFFFFFFu }, // ARM + { ArchSpec::eCore_arm_aarch64 , llvm::ELF::EM_AARCH64, LLDB_INVALID_CPUTYPE, 0xFFFFFFFFu, 0xFFFFFFFFu }, // ARM64 { ArchSpec::eCore_sparc9_generic , llvm::ELF::EM_SPARCV9, LLDB_INVALID_CPUTYPE, 0xFFFFFFFFu, 0xFFFFFFFFu }, // SPARC V9 { ArchSpec::eCore_x86_64_x86_64 , llvm::ELF::EM_X86_64 , LLDB_INVALID_CPUTYPE, 0xFFFFFFFFu, 0xFFFFFFFFu }, // AMD64 { ArchSpec::eCore_mips64 , llvm::ELF::EM_MIPS , LLDB_INVALID_CPUTYPE, 0xFFFFFFFFu, 0xFFFFFFFFu }, // MIPS @@ -1009,6 +1012,39 @@ cores_match (const ArchSpec::Core core1, } break; + case ArchSpec::eCore_arm_armv8: + if (!enforce_exact_match) + { + if (core2 == ArchSpec::eCore_arm_arm64) + return true; + if (core2 == ArchSpec::eCore_arm_aarch64) + return true; + try_inverse = false; + } + break; + + case ArchSpec::eCore_arm_aarch64: + if (!enforce_exact_match) + { + if (core2 == ArchSpec::eCore_arm_arm64) + return true; + if (core2 == ArchSpec::eCore_arm_armv8) + return true; + try_inverse = false; + } + break; + + case ArchSpec::eCore_arm_arm64: + if (!enforce_exact_match) + { + if (core2 == ArchSpec::eCore_arm_aarch64) + return true; + if (core2 == ArchSpec::eCore_arm_armv8) + return true; + try_inverse = false; + } + break; + default: break; } _______________________________________________ lldb-commits mailing list [email protected] http://lists.cs.uiuc.edu/mailman/listinfo/lldb-commits
