Author: gclayton
Date: Tue Dec 9 17:31:02 2014
New Revision: 223851
URL: http://llvm.org/viewvc/llvm-project?rev=223851&view=rev
Log:
Handle thumb IT instructions correctly all the time.
The issue with Thumb IT (if/then) instructions is the IT instruction preceeds
up to four instructions that are made conditional. If a breakpoint is placed on
one of the conditional instructions, the instruction either needs to match the
thumb opcode size (2 or 4 bytes) or a BKPT instruction needs to be used as
these are always unconditional (even in a IT instruction). If BKPT instructions
are used, then we might end up stopping on an instruction that won't get
executed. So if we do stop at a BKPT instruction, we need to continue if the
condition is not true.
When using the BKPT isntructions are easy in that you don't need to detect the
size of the breakpoint that needs to be used when setting a breakpoint even in
a thumb IT instruction. The bad part is you will now always stop at the opcode
location and let LLDB determine if it should auto-continue. If the BKPT
instruction is used, the BKPT that is used for ARM code should be something
that also triggers the BKPT instruction in Thumb in case you set a breakpoint
in the middle of code and the code is actually Thumb code. A value of
0xE120BE70 will work since the lower 16 bits being 0xBE70 happens to be a Thumb
BKPT instruction.
The alternative is to use trap or illegal instructions that the kernel will
translate into breakpoint hits. On Mac this was 0xE7FFDEFE for ARM and 0xDEFE
for Thumb. The darwin kernel currently doesn't recognize any 32 bit Thumb
instruction as a instruction that will get turned into a breakpoint exception
(EXC_BREAKPOINT), so we had to use the BKPT instruction on Mac. The linux
kernel recognizes a 16 and a 32 bit instruction as valid thumb breakpoint
opcodes. The benefit of using 16 or 32 bit instructions is you don't stop on
opcodes in a IT block when the condition doesn't match.
To further complicate things, single stepping on ARM is often implemented by
modifying the BCR/BVR registers and setting the processor to stop when the PC
is not equal to the current value. This means single stepping is another way
the ARM target can stop on instructions that won't get executed.
This patch does the following:
1 - Fix the internal debugserver for Apple to use the BKPT instruction for ARM
and Thumb
2 - Fix LLDB to catch when we stop in the middle of a Thumb IT instruction and
continue if we stop at an instruction that won't execute
3 - Fixes this in a way that will work for any target on any platform as long
as it is ARM/Thumb
4 - Adds a patch for ignoring conditions that don't match when in ARM mode (see
below)
This patch also provides the code that implements the same thing for ARM
instructions, though it is disabled for now. The ARM patch will check the
condition of the instruction in ARM mode and continue if the condition isn't
true (and therefore the instruction would not be executed). Again, this is not
enable, but the code for it has been added.
<rdar://problem/19145455>
Modified:
lldb/trunk/include/lldb/Core/ArchSpec.h
lldb/trunk/include/lldb/Target/Process.h
lldb/trunk/include/lldb/Target/Thread.h
lldb/trunk/include/lldb/Target/ThreadPlanStepOverBreakpoint.h
lldb/trunk/source/Core/ArchSpec.cpp
lldb/trunk/source/Plugins/Process/Utility/ARMDefines.h
lldb/trunk/source/Plugins/Process/Utility/StopInfoMachException.cpp
lldb/trunk/source/Target/Process.cpp
lldb/trunk/source/Target/Thread.cpp
lldb/trunk/tools/debugserver/source/MacOSX/arm/DNBArchImpl.cpp
Modified: lldb/trunk/include/lldb/Core/ArchSpec.h
URL:
http://llvm.org/viewvc/llvm-project/lldb/trunk/include/lldb/Core/ArchSpec.h?rev=223851&r1=223850&r2=223851&view=diff
==============================================================================
--- lldb/trunk/include/lldb/Core/ArchSpec.h (original)
+++ lldb/trunk/include/lldb/Core/ArchSpec.h Tue Dec 9 17:31:02 2014
@@ -145,6 +145,8 @@ public:
kCore_kalimba_last = eCore_kalimba5
};
+ typedef void (* StopInfoOverrideCallbackType)(lldb_private::Thread
&thread);
+
//------------------------------------------------------------------
/// Default constructor.
///
@@ -458,6 +460,30 @@ public:
bool
IsCompatibleMatch (const ArchSpec& rhs) const;
+ //------------------------------------------------------------------
+ /// Get a stop info override callback for the current architecture.
+ ///
+ /// Most platform specific code should go in lldb_private::Platform,
+ /// but there are cases where no matter which platform you are on
+ /// certain things hold true.
+ ///
+ /// This callback is currently intended to handle cases where a
+ /// program stops at an instruction that won't get executed and it
+ /// allows the stop reasonm, like "breakpoint hit", to be replaced
+ /// with a different stop reason like "no stop reason".
+ ///
+ /// This is specifically used for ARM in Thumb code when we stop in
+ /// an IT instruction (if/then/else) where the instruction won't get
+ /// executed and therefore it wouldn't be correct to show the program
+ /// stopped at the current PC. The code is generic and applies to all
+ /// ARM CPUs.
+ ///
+ /// @return NULL or a valid stop info override callback for the
+ /// current architecture.
+ //------------------------------------------------------------------
+ StopInfoOverrideCallbackType
+ GetStopInfoOverrideCallback () const;
+
protected:
bool
IsEqualTo (const ArchSpec& rhs, bool exact_match) const;
Modified: lldb/trunk/include/lldb/Target/Process.h
URL:
http://llvm.org/viewvc/llvm-project/lldb/trunk/include/lldb/Target/Process.h?rev=223851&r1=223850&r2=223851&view=diff
==============================================================================
--- lldb/trunk/include/lldb/Target/Process.h (original)
+++ lldb/trunk/include/lldb/Target/Process.h Tue Dec 9 17:31:02 2014
@@ -2867,7 +2867,12 @@ public:
{
return m_os_ap.get();
}
-
+
+ ArchSpec::StopInfoOverrideCallbackType
+ GetStopInfoOverrideCallback () const
+ {
+ return m_stop_info_override_callback;
+ }
virtual LanguageRuntime *
GetLanguageRuntime (lldb::LanguageType language, bool retry_if_null =
true);
@@ -3178,6 +3183,7 @@ protected:
ProcessRunLock m_public_run_lock;
ProcessRunLock m_private_run_lock;
Predicate<bool> m_currently_handling_event; // This predicate
is set in HandlePrivateEvent while all its business is being done.
+ ArchSpec::StopInfoOverrideCallbackType m_stop_info_override_callback;
bool m_currently_handling_do_on_removals;
bool m_resume_requested; // If
m_currently_handling_event or m_currently_handling_do_on_removals are true,
Resume will only request a resume, using this flag to check.
bool m_finalize_called;
Modified: lldb/trunk/include/lldb/Target/Thread.h
URL:
http://llvm.org/viewvc/llvm-project/lldb/trunk/include/lldb/Target/Thread.h?rev=223851&r1=223850&r2=223851&view=diff
==============================================================================
--- lldb/trunk/include/lldb/Target/Thread.h (original)
+++ lldb/trunk/include/lldb/Target/Thread.h Tue Dec 9 17:31:02 2014
@@ -1315,6 +1315,7 @@ protected:
lldb::ProcessWP m_process_wp; ///< The process that owns
this thread.
lldb::StopInfoSP m_stop_info_sp; ///< The private stop reason
for this thread
uint32_t m_stop_info_stop_id; // This is the stop id for
which the StopInfo is valid. Can use this so you know that
+ uint32_t m_stop_info_override_stop_id; // The stop ID
containing the last time the stop info was checked against the stop info
override
// the thread's m_stop_info_sp is current and you don't have to fetch it
again
const uint32_t m_index_id; ///< A unique 1 based index
assigned to each thread for easy UI/command line access.
lldb::RegisterContextSP m_reg_context_sp; ///< The register context for
this thread's current register state.
Modified: lldb/trunk/include/lldb/Target/ThreadPlanStepOverBreakpoint.h
URL:
http://llvm.org/viewvc/llvm-project/lldb/trunk/include/lldb/Target/ThreadPlanStepOverBreakpoint.h?rev=223851&r1=223850&r2=223851&view=diff
==============================================================================
--- lldb/trunk/include/lldb/Target/ThreadPlanStepOverBreakpoint.h (original)
+++ lldb/trunk/include/lldb/Target/ThreadPlanStepOverBreakpoint.h Tue Dec 9
17:31:02 2014
@@ -37,6 +37,11 @@ public:
virtual bool ShouldAutoContinue(Event *event_ptr);
virtual bool IsPlanStale();
+ lldb::addr_t
+ GetBreakpointLoadAddress() const
+ {
+ return m_breakpoint_addr;
+ }
protected:
virtual bool DoPlanExplainsStop (Event *event_ptr);
virtual bool DoWillResume (lldb::StateType resume_state, bool
current_plan);
Modified: lldb/trunk/source/Core/ArchSpec.cpp
URL:
http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Core/ArchSpec.cpp?rev=223851&r1=223850&r2=223851&view=diff
==============================================================================
--- lldb/trunk/source/Core/ArchSpec.cpp (original)
+++ lldb/trunk/source/Core/ArchSpec.cpp Tue Dec 9 17:31:02 2014
@@ -24,6 +24,11 @@
#include "lldb/Host/Endian.h"
#include "lldb/Host/HostInfo.h"
#include "lldb/Target/Platform.h"
+#include "lldb/Target/Process.h"
+#include "lldb/Target/RegisterContext.h"
+#include "lldb/Target/Thread.h"
+#include "Plugins/Process/Utility/ARMDefines.h"
+#include "Plugins/Process/Utility/InstructionUtils.h"
using namespace lldb;
using namespace lldb_private;
@@ -1081,3 +1086,108 @@ lldb_private::operator<(const ArchSpec&
const ArchSpec::Core rhs_core = rhs.GetCore ();
return lhs_core < rhs_core;
}
+
+static void
+StopInfoOverrideCallbackTypeARM(lldb_private::Thread &thread)
+{
+ // We need to check if we are stopped in Thumb mode in a IT instruction
+ // and detect if the condition doesn't pass. If this is the case it means
+ // we won't actually execute this instruction. If this happens we need to
+ // clear the stop reason to no thread plans think we are stopped for a
+ // reason and the plans should keep going.
+ //
+ // We do this because when single stepping many ARM processes, debuggers
+ // often use the BVR/BCR registers that says "stop when the PC is not
+ // equal to its current value". This method of stepping means we can end
+ // up stopping on instructions inside an if/then block that wouldn't get
+ // executed. By fixing this we can stop the debugger from seeming like
+ // you stepped through both the "if" _and_ the "else" clause when source
+ // level stepping because the debugger stops regardless due to the BVR/BCR
+ // triggering a stop.
+ //
+ // It also means we can set breakpoints on instructions inside an an
+ // if/then block and correctly skip them if we use the BKPT instruction.
+ // The ARM and Thumb BKPT instructions are unconditional even when executed
+ // in a Thumb IT block.
+ //
+ // If your debugger inserts software traps in ARM/Thumb code, it will
+ // need to use 16 and 32 bit instruction for 16 and 32 bit thumb
+ // instructions respectively. If your debugger inserts a 16 bit thumb
+ // trap on top of a 32 bit thumb instruction for an opcode that is inside
+ // an if/then, it will change the it/then to conditionally execute your
+ // 16 bit trap and then cause your program to crash if it executes the
+ // trailing 16 bits (the second half of the 32 bit thumb instruction you
+ // partially overwrote).
+
+ RegisterContextSP reg_ctx_sp (thread.GetRegisterContext());
+ if (reg_ctx_sp)
+ {
+ const uint32_t cpsr = reg_ctx_sp->GetFlags(0);
+ if (cpsr != 0)
+ {
+ // Read the J and T bits to get the ISETSTATE
+ const uint32_t J = Bit32(cpsr, 24);
+ const uint32_t T = Bit32(cpsr, 5);
+ const uint32_t ISETSTATE = J << 1 | T;
+ if (ISETSTATE == 0)
+ {
+ // NOTE: I am pretty sure we want to enable the code below
+ // that detects when we stop on an instruction in ARM mode
+ // that is conditional and the condition doesn't pass. This
+ // can happen if you set a breakpoint on an instruction that
+ // is conditional. We currently will _always_ stop on the
+ // instruction which is bad. You can also run into this while
+ // single stepping and you could appear to run code in the "if"
+ // and in the "else" clause because it would stop at all of the
+ // conditional instructions in both.
+ // In such cases, we really don't want to stop at this
location.
+ // I will check with the lldb-dev list first before I enable
this.
+#if 0
+ // ARM mode: check for condition on intsruction
+ const addr_t pc = reg_ctx_sp->GetPC();
+ Error error;
+ // If we fail to read the opcode we will get UINT64_MAX as the
+ // result in "opcode" which we can use to detect if we read a
+ // valid opcode.
+ const uint64_t opcode =
thread.GetProcess()->ReadUnsignedIntegerFromMemory(pc, 4, UINT64_MAX, error);
+ if (opcode <= UINT32_MAX)
+ {
+ const uint32_t condition = Bits32((uint32_t)opcode, 31,
28);
+ if (ARMConditionPassed(condition, cpsr) == false)
+ {
+ // We ARE stopped on an ARM instruction whose
condition doesn't
+ // pass so this instruction won't get executed.
+ // Regardless of why it stopped, we need to clear the
stop info
+ thread.SetStopInfo (StopInfoSP());
+ }
+ }
+#endif
+ }
+ else if (ISETSTATE == 1)
+ {
+ // Thumb mode
+ const uint32_t ITSTATE = Bits32 (cpsr, 15, 10) << 2 | Bits32
(cpsr, 26, 25);
+ if (ITSTATE != 0)
+ {
+ const uint32_t condition = Bits32(ITSTATE, 7, 4);
+ if (ARMConditionPassed(condition, cpsr) == false)
+ {
+ // We ARE stopped in a Thumb IT instruction on an
instruction whose
+ // condition doesn't pass so this instruction won't
get executed.
+ // Regardless of why it stopped, we need to clear the
stop info
+ thread.SetStopInfo (StopInfoSP());
+ }
+ }
+ }
+ }
+ }
+}
+
+ArchSpec::StopInfoOverrideCallbackType
+ArchSpec::GetStopInfoOverrideCallback () const
+{
+ const llvm::Triple::ArchType machine = GetMachine();
+ if (machine == llvm::Triple::arm)
+ return StopInfoOverrideCallbackTypeARM;
+ return NULL;
+}
Modified: lldb/trunk/source/Plugins/Process/Utility/ARMDefines.h
URL:
http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/ARMDefines.h?rev=223851&r1=223850&r2=223851&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/ARMDefines.h (original)
+++ lldb/trunk/source/Plugins/Process/Utility/ARMDefines.h Tue Dec 9 17:31:02
2014
@@ -45,7 +45,8 @@ typedef enum
#define COND_AL 0xE // Always (unconditional) Always (unconditional)
Any
#define COND_UNCOND 0xF
-static inline const char *ARMCondCodeToString(uint32_t CC)
+static inline const char *
+ARMCondCodeToString(uint32_t CC)
{
switch (CC) {
default: assert(0 && "Unknown condition code");
@@ -67,6 +68,37 @@ static inline const char *ARMCondCodeToS
}
}
+static inline bool
+ARMConditionPassed(const uint32_t condition, const uint32_t cpsr)
+{
+ const uint32_t cpsr_n = (cpsr >> 31) & 1u; // Negative condition code flag
+ const uint32_t cpsr_z = (cpsr >> 30) & 1u; // Zero condition code flag
+ const uint32_t cpsr_c = (cpsr >> 29) & 1u; // Carry condition code flag
+ const uint32_t cpsr_v = (cpsr >> 28) & 1u; // Overflow condition code flag
+
+ switch (condition) {
+ case COND_EQ: return (cpsr_z == 1);
+ case COND_NE: return (cpsr_z == 0);
+ case COND_CS: return (cpsr_c == 1);
+ case COND_CC: return (cpsr_c == 0);
+ case COND_MI: return (cpsr_n == 1);
+ case COND_PL: return (cpsr_n == 0);
+ case COND_VS: return (cpsr_v == 1);
+ case COND_VC: return (cpsr_v == 0);
+ case COND_HI: return ((cpsr_c == 1) && (cpsr_z == 0));
+ case COND_LS: return ((cpsr_c == 0) || (cpsr_z == 1));
+ case COND_GE: return (cpsr_n == cpsr_v);
+ case COND_LT: return (cpsr_n != cpsr_v);
+ case COND_GT: return ((cpsr_z == 0) && (cpsr_n == cpsr_v));
+ case COND_LE: return ((cpsr_z == 1) || (cpsr_n != cpsr_v));
+ case COND_AL:
+ case COND_UNCOND:
+ default:
+ return true;
+ }
+ return false;
+}
+
// Bit positions for CPSR
#define CPSR_T_POS 5
#define CPSR_F_POS 6
Modified: lldb/trunk/source/Plugins/Process/Utility/StopInfoMachException.cpp
URL:
http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/StopInfoMachException.cpp?rev=223851&r1=223850&r2=223851&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/StopInfoMachException.cpp
(original)
+++ lldb/trunk/source/Plugins/Process/Utility/StopInfoMachException.cpp Tue Dec
9 17:31:02 2014
@@ -423,9 +423,11 @@ StopInfoMachException::CreateStopReasonW
wp_sp->SetHardwareIndex((uint32_t)exc_sub_sub_code);
return
StopInfo::CreateStopReasonWithWatchpointID(thread, wp_sp->GetID());
}
- // EXC_ARM_DA_DEBUG seems to be reused for
EXC_BREAKPOINT as well as EXC_BAD_ACCESS
- if (thread.GetTemporaryResumeState() == eStateStepping)
- return StopInfo::CreateStopReasonToTrace(thread);
+ else
+ {
+ is_actual_breakpoint = true;
+ is_trace_if_actual_breakpoint_missing = true;
+ }
}
else if (exc_code == 1) // EXC_ARM_BREAKPOINT
{
Modified: lldb/trunk/source/Target/Process.cpp
URL:
http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Target/Process.cpp?rev=223851&r1=223850&r2=223851&view=diff
==============================================================================
--- lldb/trunk/source/Target/Process.cpp (original)
+++ lldb/trunk/source/Target/Process.cpp Tue Dec 9 17:31:02 2014
@@ -719,6 +719,7 @@ Process::Process(Target &target, Listene
m_public_run_lock (),
m_private_run_lock (),
m_currently_handling_event(false),
+ m_stop_info_override_callback (NULL),
m_finalize_called(false),
m_clear_thread_plans_on_stop (false),
m_force_next_event_delivery(false),
@@ -846,6 +847,7 @@ Process::Finalize()
m_language_runtimes.clear();
m_instrumentation_runtimes.clear();
m_next_event_action_ap.reset();
+ m_stop_info_override_callback = NULL;
//#ifdef LLDB_CONFIGURATION_DEBUG
// StreamFile s(stdout, false);
// EventSP event_sp;
@@ -3002,6 +3004,7 @@ Process::Launch (ProcessLaunchInfo &laun
m_system_runtime_ap.reset();
m_os_ap.reset();
m_process_input_reader.reset();
+ m_stop_info_override_callback = NULL;
Module *exe_module = m_target.GetExecutableModulePointer();
if (exe_module)
@@ -3093,6 +3096,8 @@ Process::Launch (ProcessLaunchInfo &laun
ResumePrivateStateThread ();
else
StartPrivateStateThread ();
+
+ m_stop_info_override_callback =
GetTarget().GetArchitecture().GetStopInfoOverrideCallback();
}
else if (state == eStateExited)
{
@@ -3270,6 +3275,7 @@ Process::Attach (ProcessAttachInfo &atta
m_jit_loaders_ap.reset();
m_system_runtime_ap.reset();
m_os_ap.reset();
+ m_stop_info_override_callback = NULL;
lldb::pid_t attach_pid = attach_info.GetProcessID();
Error error;
@@ -3527,6 +3533,8 @@ Process::CompleteAttach ()
exe_module_sp ?
exe_module_sp->GetFileSpec().GetPath().c_str () : "<none>");
}
}
+
+ m_stop_info_override_callback = process_arch.GetStopInfoOverrideCallback();
}
Error
@@ -6239,6 +6247,7 @@ Process::DidExec ()
m_instrumentation_runtimes.clear();
m_thread_list.DiscardThreadPlans();
m_memory_cache.Clear(true);
+ m_stop_info_override_callback = NULL;
DoDidExec();
CompleteAttach ();
// Flush the process (threads and all stack frames) after running
CompleteAttach()
Modified: lldb/trunk/source/Target/Thread.cpp
URL:
http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Target/Thread.cpp?rev=223851&r1=223850&r2=223851&view=diff
==============================================================================
--- lldb/trunk/source/Target/Thread.cpp (original)
+++ lldb/trunk/source/Target/Thread.cpp Tue Dec 9 17:31:02 2014
@@ -279,6 +279,7 @@ Thread::Thread (Process &process, lldb::
m_process_wp (process.shared_from_this()),
m_stop_info_sp (),
m_stop_info_stop_id (0),
+ m_stop_info_override_stop_id (0),
m_index_id (use_invalid_index_id ? LLDB_INVALID_INDEX32 :
process.GetNextThreadIndexID(tid)),
m_reg_context_sp (),
m_state (eStateUnloaded),
@@ -466,6 +467,24 @@ Thread::GetPrivateStopInfo ()
SetStopInfo (StopInfoSP());
}
}
+
+ // The stop info can be manually set by calling Thread::SetStopInfo()
+ // prior to this function ever getting called, so we can't rely on
+ // "m_stop_info_stop_id != process_stop_id" as the condition for
+ // the if statement below, we must also check the stop info to see
+ // if we need to override it. See the header documentation in
+ // Process::GetStopInfoOverrideCallback() for more information on
+ // the stop info override callback.
+ if (m_stop_info_override_stop_id != process_stop_id)
+ {
+ m_stop_info_override_stop_id = process_stop_id;
+ if (m_stop_info_sp)
+ {
+ ArchSpec::StopInfoOverrideCallbackType callback =
GetProcess()->GetStopInfoOverrideCallback();
+ if (callback)
+ callback(*this);
+ }
+ }
}
return m_stop_info_sp;
}
@@ -643,7 +662,8 @@ Thread::SetupForResume ()
lldb::RegisterContextSP reg_ctx_sp (GetRegisterContext());
if (reg_ctx_sp)
{
- BreakpointSiteSP bp_site_sp =
GetProcess()->GetBreakpointSiteList().FindByAddress(reg_ctx_sp->GetPC());
+ const addr_t thread_pc = reg_ctx_sp->GetPC();
+ BreakpointSiteSP bp_site_sp =
GetProcess()->GetBreakpointSiteList().FindByAddress(thread_pc);
if (bp_site_sp)
{
// Note, don't assume there's a ThreadPlanStepOverBreakpoint,
the target may not require anything
@@ -651,7 +671,17 @@ Thread::SetupForResume ()
ThreadPlan *cur_plan = GetCurrentPlan();
- if (cur_plan->GetKind() != ThreadPlan::eKindStepOverBreakpoint)
+ bool push_step_over_bp_plan = false;
+ if (cur_plan->GetKind() == ThreadPlan::eKindStepOverBreakpoint)
+ {
+ ThreadPlanStepOverBreakpoint *bp_plan =
(ThreadPlanStepOverBreakpoint *)cur_plan;
+ if (bp_plan->GetBreakpointLoadAddress() != thread_pc)
+ push_step_over_bp_plan = true;
+ }
+ else
+ push_step_over_bp_plan = true;
+
+ if (push_step_over_bp_plan)
{
ThreadPlanSP step_bp_plan_sp (new
ThreadPlanStepOverBreakpoint (*this));
if (step_bp_plan_sp)
Modified: lldb/trunk/tools/debugserver/source/MacOSX/arm/DNBArchImpl.cpp
URL:
http://llvm.org/viewvc/llvm-project/lldb/trunk/tools/debugserver/source/MacOSX/arm/DNBArchImpl.cpp?rev=223851&r1=223850&r2=223851&view=diff
==============================================================================
--- lldb/trunk/tools/debugserver/source/MacOSX/arm/DNBArchImpl.cpp (original)
+++ lldb/trunk/tools/debugserver/source/MacOSX/arm/DNBArchImpl.cpp Tue Dec 9
17:31:02 2014
@@ -63,8 +63,9 @@
// I'm seeing this, instead.
#define WATCHPOINT_OCCURRED ((uint32_t)(10u))
-static const uint8_t g_arm_breakpoint_opcode[] = { 0xFE, 0xDE, 0xFF, 0xE7 };
-static const uint8_t g_thumb_breakpoint_opcode[] = { 0xFE, 0xDE };
+// 0xE120BE70
+static const uint8_t g_arm_breakpoint_opcode[] = { 0x70, 0xBE, 0x20, 0xE1 };
+static const uint8_t g_thumb_breakpoint_opcode[] = { 0x70, 0xBE };
// A watchpoint may need to be implemented using two watchpoint registers.
// e.g. watching an 8-byte region when the device can only watch 4-bytes.
@@ -105,6 +106,15 @@ static uint32_t LoHi[16] = { 0 };
#define MNEMONIC_STRING_SIZE 32
#define OPERAND_STRING_SIZE 128
+// Returns true if the first 16 bit opcode of a thumb instruction indicates
+// the instruction will be a 32 bit thumb opcode
+static bool
+IsThumb32Opcode (uint16_t opcode)
+{
+ if (((opcode & 0xE000) == 0xE000) && (opcode & 0x1800))
+ return true;
+ return false;
+}
void
DNBArchMachARM::Initialize()
@@ -584,7 +594,7 @@ DNBArchMachARM::EnableHardwareSingleStep
uint16_t opcode;
if (sizeof(opcode) ==
m_thread->Process()->Task().ReadMemory(m_state.context.gpr.__pc,
sizeof(opcode), &opcode))
{
- if (((opcode & 0xE000) == 0xE000) && opcode & 0x1800)
+ if (IsThumb32Opcode(opcode))
{
// 32 bit thumb opcode...
if (m_state.context.gpr.__pc & 2)
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