================
Comment at: Host/posix/PipePosix.cpp:271
@@ -270,3 +270,3 @@
-
std::this_thread::sleep_for(milliseconds(OPEN_WRITER_SLEEP_TIMEOUT_MSECS));
+
//std::this_thread::sleep_for(milliseconds(OPEN_WRITER_SLEEP_TIMEOUT_MSECS));
}
----------------
Extra changes included by accident, I presume
================
Comment at: Plugins/Process/POSIX/POSIXThread.cpp:199-202
@@ -196,2 +198,6 @@
{
+ case llvm::Triple::arm:
+
assert(HostInfo::GetArchitecture().GetAddressByteSize() == 4);
+ reg_interface =
static_cast<RegisterInfoInterface*>(new RegisterContextLinux_arm(target_arch));
+ break;
case llvm::Triple::aarch64:
----------------
suggest keeping in alphabetical order (here and several other places)
================
Comment at: Plugins/Process/POSIX/ProcessPOSIX.cpp:678-679
@@ +677,4 @@
+ // but the linux kernel does otherwise.
+ static const uint8_t g_arm_breakpoint_opcode[] = { 0xf0, 0x01,
0xf0, 0xe7 };
+ static const uint8_t g_thumb_breakpoint_opcode[] = { 0x01, 0xde };
+
----------------
ProcessPOSIX.cpp is used by Linux and FreeBSD so if Linux implements
non-standard behaviour this will need to be changed
================
Comment at: Plugins/Process/elf-core/ProcessElfCore.cpp:428
@@ -427,2 +427,3 @@
bool lp64 = (arch.GetMachine() == llvm::Triple::aarch64 ||
+ arch.GetMachine() == llvm::Triple::arm ||
arch.GetMachine() == llvm::Triple::mips64 ||
----------------
32-bit arm is not LP64
================
Comment at: Plugins/Process/elf-core/ThreadElfCore.cpp:135-137
@@ -132,2 +134,5 @@
break;
+ case llvm::Triple::arm:
+ reg_interface = new RegisterContextLinux_arm(arch);
+ break;
default:
----------------
alpha order
================
Comment at: Plugins/Process/elf-core/ThreadElfCore.cpp:157-159
@@ -151,2 +156,5 @@
{
+ case llvm::Triple::arm:
+ m_thread_reg_ctx_sp.reset(new RegisterContextCorePOSIX_arm
(*this, reg_interface, m_gpregset_data, m_fpregset_data));
+ break;
case llvm::Triple::aarch64:
----------------
alpha order
http://reviews.llvm.org/D8719
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