dsanders added a comment. > The route cause of your problem is that ReadRegisterUnsigned returns a value > where the 32 MSB is garbage while the
> expected behavior is to zero out those bits (it works on i386 and arm > AFAIK). You should find out why that is happening > and fix the root cause of it what will fix your single stepping issue as > well. I don't know if this is important to problem or not, but I think I should mention that the expectation of zero bits disagrees with MIPS hardware. MIPS hardware would expect the 32 MSB to be a sign-extension of the 32 LSB. As part of our forward compatibility strategy, we widen registers (e.g. from MIPS32 to MIPS64) by sign extending the values produced by every operation that existed before and add additional operations as needed (e.g. MIPS64 adds 'lwu' which is a unsigned 32-bit load). Admittedly it's a bit unintuitive for an unsigned 32-bit value from a MIPS32 binary to be represented in a 64-bit register as, for example, 0xffffffff80000000 but the debugger shouldn't normally admit to the existence of the extra bits when debugging 32-bit code so the user won't normally see this. Another result of this is that our address space grows at both ends and the previous address space is in the middle like so: MIPS64's extra user space | MIPS32's user space | MIPS32's kernel space | MIPS64's extra kernel space. Hope this helps Repository: rL LLVM http://reviews.llvm.org/D14633 _______________________________________________ lldb-commits mailing list lldb-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits
