nitesh.jain created this revision.
nitesh.jain added reviewers: clayborg, sagar.
nitesh.jain added subscribers: jaydeep, bhushan, mohit.bhakkad, lldb-commits.
nitesh.jain set the repository for this revision to rL LLVM.
Herald added a subscriber: sdardis.
Currently floating point regsiters has "eEncodingUint" encoding. Hence register
write $fx '1.25' will failed. This patch add eEncodingIEEE754 encoding for
floating point registers($f0 - $f31). This patch will fix
test_fp_register_write in TestRegisters.py
Repository:
rL LLVM
http://reviews.llvm.org/D18853
Files:
source/Plugins/Process/Utility/RegisterInfos_mips.h
source/Plugins/Process/Utility/RegisterInfos_mips64.h
Index: source/Plugins/Process/Utility/RegisterInfos_mips64.h
===================================================================
--- source/Plugins/Process/Utility/RegisterInfos_mips64.h
+++ source/Plugins/Process/Utility/RegisterInfos_mips64.h
@@ -56,6 +56,10 @@
eFormatHex, { kind1, kind2, kind3, kind4, gpr_##reg##_mips64 }, NULL,
NULL }
#define DEFINE_FPR(reg, alt, kind1, kind2, kind3, kind4) \
+ { #reg, alt, sizeof(((FPR_linux_mips*)0)->reg), FPR_OFFSET(reg),
eEncodingIEEE754, \
+ eFormatFloat, { kind1, kind2, kind3, kind4, fpr_##reg##_mips64 }, NULL,
NULL }
+
+#define DEFINE_FPR_INFO(reg, alt, kind1, kind2, kind3, kind4) \
{ #reg, alt, sizeof(((FPR_linux_mips*)0)->reg), FPR_OFFSET(reg),
eEncodingUint, \
eFormatHex, { kind1, kind2, kind3, kind4, fpr_##reg##_mips64 }, NULL,
NULL }
@@ -184,9 +188,9 @@
DEFINE_FPR (f29, nullptr, dwarf_f29_mips64, dwarf_f29_mips64,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR (f30, nullptr, dwarf_f30_mips64, dwarf_f30_mips64,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR (f31, nullptr, dwarf_f31_mips64, dwarf_f31_mips64,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
- DEFINE_FPR (fcsr, nullptr, dwarf_fcsr_mips64, dwarf_fcsr_mips64,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
- DEFINE_FPR (fir, nullptr, dwarf_fir_mips64, dwarf_fir_mips64,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
- DEFINE_FPR (config5, nullptr, dwarf_config5_mips64,
dwarf_config5_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+ DEFINE_FPR_INFO (fcsr, nullptr, dwarf_fcsr_mips64,
dwarf_fcsr_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+ DEFINE_FPR_INFO (fir, nullptr, dwarf_fir_mips64,
dwarf_fir_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+ DEFINE_FPR_INFO (config5, nullptr, dwarf_config5_mips64,
dwarf_config5_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA (w0, nullptr, dwarf_w0_mips64, dwarf_w0_mips64,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA (w1, nullptr, dwarf_w1_mips64, dwarf_w1_mips64,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA (w2, nullptr, dwarf_w2_mips64, dwarf_w2_mips64,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
@@ -233,6 +237,7 @@
#undef DEFINE_GPR
#undef DEFINE_GPR_INFO
#undef DEFINE_FPR
+#undef DEFINE_FPR_INFO
#undef DEFINE_MSA
#undef DEFINE_MSA_INFO
#undef GPR_OFFSET
Index: source/Plugins/Process/Utility/RegisterInfos_mips.h
===================================================================
--- source/Plugins/Process/Utility/RegisterInfos_mips.h
+++ source/Plugins/Process/Utility/RegisterInfos_mips.h
@@ -39,8 +39,12 @@
eFormatHex, { kind1, kind2, kind3, kind4, gpr_##reg##_mips }, NULL, NULL
}
#define DEFINE_FPR(reg, alt, kind1, kind2, kind3, kind4) \
- { #reg, alt, sizeof(((FPR_linux_mips*)NULL)->reg), FPR_OFFSET(reg),
eEncodingUint, \
- eFormatHex, { kind1, kind2, kind3, kind4, fpr_##reg##_mips }, NULL, NULL
}
+ { #reg, alt, sizeof(((FPR_linux_mips*)NULL)->reg), FPR_OFFSET(reg),
eEncodingIEEE754, \
+ eFormatFloat, { kind1, kind2, kind3, kind4, fpr_##reg##_mips }, NULL,
NULL }
+
+#define DEFINE_FPR_INFO(reg, alt, kind1, kind2, kind3, kind4) \
+ { #reg, alt, sizeof(((FPR_linux_mips*)NULL)->reg), FPR_OFFSET(reg),
eEncodingUint, \
+ eFormatHex, { kind1, kind2, kind3, kind4, fpr_##reg##_mips }, NULL, NULL }
#define DEFINE_MSA(reg, alt, kind1, kind2, kind3, kind4) \
{ #reg, alt, sizeof(((MSA_linux_mips*)0)->reg), MSA_OFFSET(reg),
eEncodingVector, \
@@ -126,9 +130,9 @@
DEFINE_FPR (f29, nullptr, dwarf_f29_mips, dwarf_f29_mips,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR (f30, nullptr, dwarf_f30_mips, dwarf_f30_mips,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR (f31, nullptr, dwarf_f31_mips, dwarf_f31_mips,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
- DEFINE_FPR (fcsr, nullptr, dwarf_fcsr_mips, dwarf_fcsr_mips,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
- DEFINE_FPR (fir, nullptr, dwarf_fir_mips, dwarf_fir_mips,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
- DEFINE_FPR (config5, nullptr, dwarf_config5_mips,
dwarf_config5_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+ DEFINE_FPR_INFO (fcsr, nullptr, dwarf_fcsr_mips, dwarf_fcsr_mips,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+ DEFINE_FPR_INFO (fir, nullptr, dwarf_fir_mips, dwarf_fir_mips,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+ DEFINE_FPR_INFO (config5, nullptr, dwarf_config5_mips,
dwarf_config5_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA (w0, nullptr, dwarf_w0_mips, dwarf_w0_mips,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA (w1, nullptr, dwarf_w1_mips, dwarf_w1_mips,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA (w2, nullptr, dwarf_w2_mips, dwarf_w2_mips,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
@@ -176,6 +180,7 @@
#undef MSA_OFFSET
#undef DEFINE_GPR
#undef DEFINE_FPR
+#undef DEFINE_FPR_INFO
#undef DEFINE_MSA
#undef DEFINE_MSA_INFO
Index: source/Plugins/Process/Utility/RegisterInfos_mips64.h
===================================================================
--- source/Plugins/Process/Utility/RegisterInfos_mips64.h
+++ source/Plugins/Process/Utility/RegisterInfos_mips64.h
@@ -56,6 +56,10 @@
eFormatHex, { kind1, kind2, kind3, kind4, gpr_##reg##_mips64 }, NULL, NULL }
#define DEFINE_FPR(reg, alt, kind1, kind2, kind3, kind4) \
+ { #reg, alt, sizeof(((FPR_linux_mips*)0)->reg), FPR_OFFSET(reg), eEncodingIEEE754, \
+ eFormatFloat, { kind1, kind2, kind3, kind4, fpr_##reg##_mips64 }, NULL, NULL }
+
+#define DEFINE_FPR_INFO(reg, alt, kind1, kind2, kind3, kind4) \
{ #reg, alt, sizeof(((FPR_linux_mips*)0)->reg), FPR_OFFSET(reg), eEncodingUint, \
eFormatHex, { kind1, kind2, kind3, kind4, fpr_##reg##_mips64 }, NULL, NULL }
@@ -184,9 +188,9 @@
DEFINE_FPR (f29, nullptr, dwarf_f29_mips64, dwarf_f29_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR (f30, nullptr, dwarf_f30_mips64, dwarf_f30_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR (f31, nullptr, dwarf_f31_mips64, dwarf_f31_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
- DEFINE_FPR (fcsr, nullptr, dwarf_fcsr_mips64, dwarf_fcsr_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
- DEFINE_FPR (fir, nullptr, dwarf_fir_mips64, dwarf_fir_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
- DEFINE_FPR (config5, nullptr, dwarf_config5_mips64, dwarf_config5_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+ DEFINE_FPR_INFO (fcsr, nullptr, dwarf_fcsr_mips64, dwarf_fcsr_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+ DEFINE_FPR_INFO (fir, nullptr, dwarf_fir_mips64, dwarf_fir_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+ DEFINE_FPR_INFO (config5, nullptr, dwarf_config5_mips64, dwarf_config5_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA (w0, nullptr, dwarf_w0_mips64, dwarf_w0_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA (w1, nullptr, dwarf_w1_mips64, dwarf_w1_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA (w2, nullptr, dwarf_w2_mips64, dwarf_w2_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
@@ -233,6 +237,7 @@
#undef DEFINE_GPR
#undef DEFINE_GPR_INFO
#undef DEFINE_FPR
+#undef DEFINE_FPR_INFO
#undef DEFINE_MSA
#undef DEFINE_MSA_INFO
#undef GPR_OFFSET
Index: source/Plugins/Process/Utility/RegisterInfos_mips.h
===================================================================
--- source/Plugins/Process/Utility/RegisterInfos_mips.h
+++ source/Plugins/Process/Utility/RegisterInfos_mips.h
@@ -39,8 +39,12 @@
eFormatHex, { kind1, kind2, kind3, kind4, gpr_##reg##_mips }, NULL, NULL }
#define DEFINE_FPR(reg, alt, kind1, kind2, kind3, kind4) \
- { #reg, alt, sizeof(((FPR_linux_mips*)NULL)->reg), FPR_OFFSET(reg), eEncodingUint, \
- eFormatHex, { kind1, kind2, kind3, kind4, fpr_##reg##_mips }, NULL, NULL }
+ { #reg, alt, sizeof(((FPR_linux_mips*)NULL)->reg), FPR_OFFSET(reg), eEncodingIEEE754, \
+ eFormatFloat, { kind1, kind2, kind3, kind4, fpr_##reg##_mips }, NULL, NULL }
+
+#define DEFINE_FPR_INFO(reg, alt, kind1, kind2, kind3, kind4) \
+ { #reg, alt, sizeof(((FPR_linux_mips*)NULL)->reg), FPR_OFFSET(reg), eEncodingUint, \
+ eFormatHex, { kind1, kind2, kind3, kind4, fpr_##reg##_mips }, NULL, NULL }
#define DEFINE_MSA(reg, alt, kind1, kind2, kind3, kind4) \
{ #reg, alt, sizeof(((MSA_linux_mips*)0)->reg), MSA_OFFSET(reg), eEncodingVector, \
@@ -126,9 +130,9 @@
DEFINE_FPR (f29, nullptr, dwarf_f29_mips, dwarf_f29_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR (f30, nullptr, dwarf_f30_mips, dwarf_f30_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR (f31, nullptr, dwarf_f31_mips, dwarf_f31_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
- DEFINE_FPR (fcsr, nullptr, dwarf_fcsr_mips, dwarf_fcsr_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
- DEFINE_FPR (fir, nullptr, dwarf_fir_mips, dwarf_fir_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
- DEFINE_FPR (config5, nullptr, dwarf_config5_mips, dwarf_config5_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+ DEFINE_FPR_INFO (fcsr, nullptr, dwarf_fcsr_mips, dwarf_fcsr_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+ DEFINE_FPR_INFO (fir, nullptr, dwarf_fir_mips, dwarf_fir_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+ DEFINE_FPR_INFO (config5, nullptr, dwarf_config5_mips, dwarf_config5_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA (w0, nullptr, dwarf_w0_mips, dwarf_w0_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA (w1, nullptr, dwarf_w1_mips, dwarf_w1_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA (w2, nullptr, dwarf_w2_mips, dwarf_w2_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
@@ -176,6 +180,7 @@
#undef MSA_OFFSET
#undef DEFINE_GPR
#undef DEFINE_FPR
+#undef DEFINE_FPR_INFO
#undef DEFINE_MSA
#undef DEFINE_MSA_INFO
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