rengolin added a comment. In http://reviews.llvm.org/D19604#420681, @jasonmolenda wrote:
> fwiw, there are ARM cores that only support thumb - the Cortex M series. And they're still "armv7". :) Remember, "armv7" is *not* the same as ARMv7A+NEON. If the only thing you have is "armv7" or even "armv7-a", you *cannot* assume NEON is present. > The importance of the triple used will come in to play when you try to > evaluate an expression on the device -- lldb will call into llvm to parse/jit > the expression into machine code for the device. For instance, if > "arm-windows" translates to a minimum arm target, llvm may not think it has > any fp/NEON instructions. This is worrying. LLDB should *not* rely only on the triple, but all architectural options (mcpu/mtune/march/mfpu/mfloat-abi). Without it, it can infer very little, and obscure bugs will crop up if the meaning of the triple changes slightly in the future. > As for lldb disassembling as arm/thumb (or instruction emulation for > unwinding), today it doesn't use the CPSR/XPSR T bit to tell if the current > instruction is thumb or not, it depends on annotations in the symbol file to > do this correctly. I don't think it uses the 0th bit of saved pc values up > the stack to tell this either -- it is a pretty fixed model of depending on > the symbols to indicate whether they're arm or thumb. These are the easy cases. You still need both disassemblers to areas where you have no idea what it is (system binaries, etc.), where you have to try both and see which one has the least number of errors. :) cheers, --renato http://reviews.llvm.org/D19604 _______________________________________________ lldb-commits mailing list lldb-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits
