DavidSpickett wrote:
I have got Arm's Foundation Model to boot with SME only, and the cpuinfo is:
```
Features : fp asimd evtstrm crc32 atomics fphp asimdhp cpuid asimdrdm
jscvt fcma lrcpc dcpop asimddp asimdfhm dit uscat ilrcpc flagm sb paca pacg gcs
dcpodp flagm2 frint i8mm bf16 dgh rng bti ecv afp sme smei16i64 smef64f64
smei8i32 smef16f32 smeb16f32 smef32f32 wfxt ebf16 cssc mops hbc poe
```
It reports `sme` but no `sve` features, which makes sense because I built the
kernel from the latest commit. I thought I was missing something else to get
`sve2` as was seen in the linked docker issue.
Also, SME is disabled in kernel config for unrelated reasons, so I had to
re-enable that:
```
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index a182295e6..27437f131 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -2285,7 +2285,6 @@ config ARM64_SME
bool "ARM Scalable Matrix Extension support"
default y
depends on ARM64_SVE
- depends on BROKEN
help
The Scalable Matrix Extension (SME) is an extension to the AArch64
execution state which utilises a substantial subset of the SVE
```
I will find out what QEMU can do / plans to do.
Assuming I reproduce the failures this PR aims to fix, I'll write up an issue
with how to reproduce it without an actual M4 and we can mark this as the fix
for it.
https://github.com/llvm/llvm-project/pull/135563
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