DavidSpickett wrote: Thanks for the reproducer. Please include it in the PR description as well, as it may be the closest thing we get to a test case.
I'm still not clear how you found this, but if the answer is: * You spotted it by reading code * You have a downstream target with registers like this * You are working on some NDA'd thing Then the conclusion is the same. Hard to test this with an upstream target. We have faked targets in testing before, so I think we could fake an AArch64 where V registers were not vectors, as this type is set in the XML sent from the debug server. `lldb/test/API/functionalities/gdb_remote_client/TestXMLRegisterFlags.py` is an example of this. Then again, I found that there's no public API for this call. Running an expression on a fake target like that could work but it'd be a lot of mock stuff to implement (for a start, we'd need to pretend it can JIT code). We have some tests that put a simulated debug sever in front of a real one, but that's too much effort for this fix. Let me think about it for a bit. If I don't come up with anything then I'll approve this, as it does look correct to me. https://github.com/llvm/llvm-project/pull/163646 _______________________________________________ lldb-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits
