sga-sc wrote: Quote from RISC-V ISA, 2.6. Load and Store Instructions:
Load and store instructions transfer a value between the registers and memory. Loads are encoded in the Itype format and stores are S-type. **The effective address is obtained by adding register rs1 to the signextended 12-bit offset**. Loads copy a value from memory to register rd. Stores copy the value in register rs2 to memory. https://github.com/llvm/llvm-project/pull/167490 _______________________________________________ lldb-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits
