[Lldb-commits] [lldb] [lldb][RISCV] Fix GetRegisterInfo to support RISCV-32 (PR #175262)

[via lldb-commits]

https://github.com/MkDev11 updated 
https://github.com/llvm/llvm-project/pull/175262

>From 7fa5bc6e59b113a3de6a7ac7055b046410896c8c Mon Sep 17 00:00:00 2001
From: mkdev11 <jaysmth...@gmail.com>
Date: Mon, 12 Jan 2026 15:46:56 +0200
Subject: [PATCH] [lldb][RISCV] Fix GetRegisterInfo to support RISCV-32

GetRegisterInfo in EmulateInstructionRISCV.cpp was hardcoded to use
RegisterInfoPOSIX_riscv64, which caused LLDB to assert when working
with RISCV-32 ELF files.

This patch adds a check for the architecture and uses
RegisterInfoPOSIX_riscv32 when the target is RISCV-32.

Fixes #175092
---
 .../RISCV/EmulateInstructionRISCV.cpp         | 35 ++++++++++++++-----
 .../Instruction/RISCV/TestRISCVEmulator.cpp   | 19 ++++++++++
 2 files changed, 45 insertions(+), 9 deletions(-)

diff --git a/lldb/source/Plugins/Instruction/RISCV/EmulateInstructionRISCV.cpp 
b/lldb/source/Plugins/Instruction/RISCV/EmulateInstructionRISCV.cpp
index 2957cb716041d..a12b78b0cd803 100644
--- a/lldb/source/Plugins/Instruction/RISCV/EmulateInstructionRISCV.cpp
+++ b/lldb/source/Plugins/Instruction/RISCV/EmulateInstructionRISCV.cpp
@@ -7,6 +7,7 @@
 
//===----------------------------------------------------------------------===//
 
 #include "EmulateInstructionRISCV.h"
+#include "Plugins/Process/Utility/RegisterInfoPOSIX_riscv32.h"
 #include "Plugins/Process/Utility/RegisterInfoPOSIX_riscv64.h"
 #include "Plugins/Process/Utility/lldb-riscv-register-enums.h"
 #include "RISCVCInstructions.h"
@@ -1809,6 +1810,19 @@ bool EmulateInstructionRISCV::SetAccruedExceptions(
   return WriteRegisterUnsigned(ctx, eRegisterKindLLDB, fpr_fcsr_riscv, fcsr);
 }
 
+template <typename T>
+static std::optional<RegisterInfo>
+GetRegisterInfoHelper(const T &reg_info, uint32_t reg_index,
+                      RegisterKind reg_kind) {
+  const RegisterInfo *array = reg_info.GetRegisterInfo();
+  const uint32_t length = reg_info.GetRegisterCount();
+
+  if (reg_index >= length || reg_kind != eRegisterKindLLDB)
+    return {};
+
+  return array[reg_index];
+}
+
 std::optional<RegisterInfo>
 EmulateInstructionRISCV::GetRegisterInfo(RegisterKind reg_kind,
                                          uint32_t reg_index) {
@@ -1837,15 +1851,18 @@ EmulateInstructionRISCV::GetRegisterInfo(RegisterKind 
reg_kind,
     }
   }
 
-  RegisterInfoPOSIX_riscv64 reg_info(m_arch,
-                                     
RegisterInfoPOSIX_riscv64::eRegsetMaskAll);
-  const RegisterInfo *array = reg_info.GetRegisterInfo();
-  const uint32_t length = reg_info.GetRegisterCount();
-
-  if (reg_index >= length || reg_kind != eRegisterKindLLDB)
-    return {};
-
-  return array[reg_index];
+  switch (m_arch.GetCore()) {
+  case ArchSpec::eCore_riscv32:
+    return GetRegisterInfoHelper(
+        RegisterInfoPOSIX_riscv32(m_arch,
+                                  RegisterInfoPOSIX_riscv32::eRegsetMaskAll),
+        reg_index, reg_kind);
+  default:
+    return GetRegisterInfoHelper(
+        RegisterInfoPOSIX_riscv64(m_arch,
+                                  RegisterInfoPOSIX_riscv64::eRegsetMaskAll),
+        reg_index, reg_kind);
+  }
 }
 
 bool EmulateInstructionRISCV::SetInstruction(const Opcode &opcode,
diff --git a/lldb/unittests/Instruction/RISCV/TestRISCVEmulator.cpp 
b/lldb/unittests/Instruction/RISCV/TestRISCVEmulator.cpp
index 90d5a7c4f3b97..39b07f7ec76a6 100644
--- a/lldb/unittests/Instruction/RISCV/TestRISCVEmulator.cpp
+++ b/lldb/unittests/Instruction/RISCV/TestRISCVEmulator.cpp
@@ -16,6 +16,7 @@
 #include "lldb/Utility/RegisterValue.h"
 
 #include "Plugins/Instruction/RISCV/EmulateInstructionRISCV.h"
+#include "Plugins/Process/Utility/RegisterInfoPOSIX_riscv32.h"
 #include "Plugins/Process/Utility/RegisterInfoPOSIX_riscv64.h"
 #include "Plugins/Process/Utility/lldb-riscv-register-enums.h"
 
@@ -806,3 +807,21 @@ TEST_F(RISCVEmulatorTester, TestFMV_D_XInst) {
   ASSERT_TRUE(this->Execute(*decode, false));
   ASSERT_EQ(this->fpr.fpr[DecodeRD(FMV_D_XInst)], bits);
 }
+
+TEST_F(RISCVEmulatorTester, TestGetRegisterInfoRV64) {
+  // Test that GetRegisterInfo returns valid register info for RV64
+  auto reg_info = this->GetRegisterInfo(eRegisterKindLLDB, gpr_x1_riscv);
+  ASSERT_TRUE(reg_info.has_value());
+  ASSERT_EQ(reg_info->byte_size, 8u);
+  ASSERT_STREQ(reg_info->name, "ra");
+}
+
+TEST_F(RISCVEmulatorTester32, TestGetRegisterInfoRV32) {
+  // Test that GetRegisterInfo returns valid register info for RV32
+  // This verifies the fix for issue #175092 where GetRegisterInfo was
+  // hardcoded to use RegisterInfoPOSIX_riscv64
+  auto reg_info = this->GetRegisterInfo(eRegisterKindLLDB, gpr_x1_riscv);
+  ASSERT_TRUE(reg_info.has_value());
+  ASSERT_EQ(reg_info->byte_size, 4u);
+  ASSERT_STREQ(reg_info->name, "ra");
+}

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