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``````````bash
git-clang-format --diff origin/main HEAD --extensions c,cpp --
lldb/test/API/commands/register/aarch64_dynamic_regset/main.c
lldb/test/API/commands/register/aarch64_sve_registers/rw_access_static_config/main.c
llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.cpp --diff_from_common_commit
``````````
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``````````diff
diff --git a/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
b/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
index 3fad1ef35..b619f525a 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
@@ -4270,8 +4270,8 @@ static int getIntOperandFromRegisterString(StringRef
RegString) {
// Need to combine the integer fields of the string into a single value
// based on the bit encoding of MRS/MSR instruction.
- return (Ops[0] << 14) | (Ops[1] << 11) | (Ops[2] << 7) |
- (Ops[3] << 3) | (Ops[4]);
+ return (Ops[0] << 14) | (Ops[1] << 11) | (Ops[2] << 7) | (Ops[3] << 3) |
+ (Ops[4]);
}
// Lower the read_register intrinsic to an MRS instruction node if the special
``````````
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https://github.com/llvm/llvm-project/pull/201137
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