================
@@ -40,9 +43,42 @@ class RegisterInfoPOSIXDynamic_riscv32
   const lldb_private::RegisterInfo *
   GetRegisterInfo(llvm::StringRef reg_name) const;
 
+  /// \brief Builds CS register information entries for 32-bit RISC-V debug
+  ///        targets on the basis of the enabled ISA extensions.
+  ///
+  /// Custom and vendor RISC-V extensions can define CSRs that overlap
+  /// in address space. This routine constructs a baseline CSR container and
+  /// applies extension patches in a deterministic order so that the final CSR
+  /// metadata depends only on the feature set and conflict resolution is
+  /// predictable.
+  ///
+  /// \param[in]     features     ISA extension feature names.
+  ///
+  /// \param[in,out] cs_reg_infos Container to populate with CS register
+  ///                             information entries for the 32-bit RISC-V
+  ///                             debug target configuration.
----------------
JDevlieghere wrote:

Does this warrant such extensive comments? Could we tighten this a bit? Also 
applies to the other Doxygen comments in this PR.

>From 
>https://llvm.org/docs/CodingStandards.html#doxygen-use-in-documentation-comments:
> 

> Only include [...] function parameters and return values when it provides 
> additional information, such as intent, usage, or behavior that’s 
> non-obvious. 

https://github.com/llvm/llvm-project/pull/203234
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