manojgupta created this revision.
Herald added subscribers: ctetreau, omjavaid, kristof.beyls, tschuett.
Herald added a project: All.
manojgupta requested review of this revision.
Herald added a project: LLDB.
Herald added a subscriber: lldb-commits.
Use correct internal sve functions for arm64.
Otherwise, when cross-compling lld for AArch64 there are build
errors like:
NativeRegisterContextLinux_arm64.cpp:936:11:
error: use of undeclared identifier 'sve_vl_valid
NativeRegisterContextLinux_arm64.cpp:63:28:
error: variable has incomplete type 'struct user_sve_header'
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D148752
Files:
lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
Index: lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
===================================================================
--- lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
+++ lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
@@ -61,7 +61,7 @@
case llvm::Triple::aarch64: {
// Configure register sets supported by this AArch64 target.
// Read SVE header to check for SVE support.
- struct user_sve_header sve_header;
+ struct sve::user_sve_header sve_header;
struct iovec ioVec;
ioVec.iov_base = &sve_header;
ioVec.iov_len = sizeof(sve_header);
@@ -380,7 +380,7 @@
if (GetRegisterInfo().IsSVERegVG(reg)) {
uint64_t vg_value = reg_value.GetAsUInt64();
- if (sve_vl_valid(vg_value * 8)) {
+ if (sve::vl_valid(vg_value * 8)) {
if (m_sve_header_is_valid && vg_value == GetSVERegVG())
return error;
@@ -566,7 +566,7 @@
if (contains_sve_reg_data) {
// We have SVE register data first write SVE header.
::memcpy(GetSVEHeader(), src, GetSVEHeaderSize());
- if (!sve_vl_valid(m_sve_header.vl)) {
+ if (!sve::vl_valid(m_sve_header.vl)) {
m_sve_header_is_valid = false;
error.SetErrorStringWithFormat("NativeRegisterContextLinux_arm64::%s "
"Invalid SVE header in data_sp",
@@ -934,7 +934,7 @@
// On every stop we configure SVE vector length by calling
// ConfigureVectorLength regardless of current SVEState of this thread.
uint32_t vq = RegisterInfoPOSIX_arm64::eVectorQuadwordAArch64SVE;
- if (sve_vl_valid(m_sve_header.vl))
+ if (sve::vl_valid(m_sve_header.vl))
vq = sve::vq_from_vl(m_sve_header.vl);
GetRegisterInfo().ConfigureVectorLength(vq);
Index: lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
===================================================================
--- lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
+++ lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
@@ -61,7 +61,7 @@
case llvm::Triple::aarch64: {
// Configure register sets supported by this AArch64 target.
// Read SVE header to check for SVE support.
- struct user_sve_header sve_header;
+ struct sve::user_sve_header sve_header;
struct iovec ioVec;
ioVec.iov_base = &sve_header;
ioVec.iov_len = sizeof(sve_header);
@@ -380,7 +380,7 @@
if (GetRegisterInfo().IsSVERegVG(reg)) {
uint64_t vg_value = reg_value.GetAsUInt64();
- if (sve_vl_valid(vg_value * 8)) {
+ if (sve::vl_valid(vg_value * 8)) {
if (m_sve_header_is_valid && vg_value == GetSVERegVG())
return error;
@@ -566,7 +566,7 @@
if (contains_sve_reg_data) {
// We have SVE register data first write SVE header.
::memcpy(GetSVEHeader(), src, GetSVEHeaderSize());
- if (!sve_vl_valid(m_sve_header.vl)) {
+ if (!sve::vl_valid(m_sve_header.vl)) {
m_sve_header_is_valid = false;
error.SetErrorStringWithFormat("NativeRegisterContextLinux_arm64::%s "
"Invalid SVE header in data_sp",
@@ -934,7 +934,7 @@
// On every stop we configure SVE vector length by calling
// ConfigureVectorLength regardless of current SVEState of this thread.
uint32_t vq = RegisterInfoPOSIX_arm64::eVectorQuadwordAArch64SVE;
- if (sve_vl_valid(m_sve_header.vl))
+ if (sve::vl_valid(m_sve_header.vl))
vq = sve::vq_from_vl(m_sve_header.vl);
GetRegisterInfo().ConfigureVectorLength(vq);
_______________________________________________
lldb-commits mailing list
lldb-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits
