> On Dec 11, 2014, at 11:24 AM, Ted Woodward <ted.woodw...@codeaurora.org> > wrote: > > Some cores can change register sizes on the fly; for example, the Freescale > e6500 can switch between 32 bit and 64 bit mode by writing the CM bit in the > MSR. This causes the upper 32 bits of many 64 bit registers to be ignored. > > I’m working with a device that has registers that behave like this. I could > display the larger size, but that’s confusing to a user who’s working with > the smaller size. > > Is there a way to change register size on the fly?
Yes. Your RegisterContext subclass needs to override: virtual const RegisterInfo * GetRegisterInfoAtIndex (size_t reg) = 0; So you can just return the correct RegisterInfo that contains "4" or "8" as the RegisterInfo.byte_size by grabbing using the m_thread to get to the process and somehow read the MSR and return the correct one dynamically. Greg _______________________________________________ lldb-dev mailing list lldb-dev@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/lldb-dev