Hi, We are planning to implement support for various MIPS ABIs (O32, N32, O64 and N64) and application specific extensions (ASE) like DSP and SIMD. Additionally we are planning to implement microMIPS ISA as an extension to the existing MIPS32/64 bit cores.
Currently there are around 20 MIPS cores added in the ArchSpec. If we consider the various combinations of ABI+ASE+Core then number of cores for MIPS in (ArchSpec::Core) would increase significantly. We would like to keep the number of base cores (mips32, mips32r2, mips64 etc.) as it is and evaluate ABIs/ASEs dynamically using elf::ELFHeader::e_flags. We would need to extend the ArchSpec with the information contained in elf::ELFHeader::e_flags. ArchSpec will have say "m_flags", which will be set to elf::ELFHeader::e_flags. Then this information can be used in - ABI plugin to know the ABI contained in the ELF - EmulateInstruction plugin to know the ASE (MicroMips for example) and then Emulate the instructions accordingly. Please let us know your thoughts on this. -Bhushan
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