https://llvm.org/bugs/show_bug.cgi?id=23944
Bug ID: 23944
Summary: Single step atomic sequences
Product: lldb
Version: unspecified
Hardware: All
OS: All
Status: NEW
Severity: normal
Priority: P
Component: All Bugs
Assignee: lldb-dev@cs.uiuc.edu
Reporter: tbergham...@google.com
Classification: Unclassified
On several architectures there are atomic instruction sequences where placing a
breakpoint in the middle of them changes the behavior of the code. The expected
behavior from the debugger is to treat these sequences as a "single instruction
block" and step through it and place breakpoints only outside of it.
Example on ARM (code came from libc.so`pthread_mutex_lock):
libc.so[0x17738] <+190>: ldrex lr, [r4]
libc.so[0x1773c] <+194>: mov.w r2, #0x0
libc.so[0x17740] <+198>: teq.w lr, r5
libc.so[0x17744] <+202>: it eq
libc.so[0x17746] <+204>: strexeq r2, r12, [r4]
libc.so[0x1774a] <+208>: cmp r2, #0x0
libc.so[0x1774c] <+210>: bne 0x17738 ; <+190>
There is an internal link (implemented inside of the processor) between the
ldrex and the strex instruction. If the evaluation of the code brakes between
these 2 instructions then this link broke resulting in a change in the behavior
of the code (in this case strex will always fail).
P.S.: The issue (in theory) handled by GDB properly on ARM
(https://sourceware.org/ml/gdb-patches/2011-12/msg00235.html)
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