Author: void Date: Tue Aug 12 00:41:35 2014 New Revision: 215430 URL: http://llvm.org/viewvc/llvm-project?rev=215430&view=rev Log: Merging r214679: ------------------------------------------------------------------------ r214679 | chandlerc | 2014-08-03 17:54:28 -0700 (Sun, 03 Aug 2014) | 10 lines
[x86] Fix the test case added in r214670 and tweaked in r214674 further. Fundamentally, there isn't a really portable way to test the constant pool contents. Instead, pin this test to the bare-metal triple. This also makes it a 64-bit triple which allows us to only match a single constant pool rather than two. It can also just hard code the '.' prefix as the format should be stable now that it has a fixed triple. Finally, I've switched it to use CHECK-NEXT to be more precise in the instruction sequence expected and to use variables rather than hard coding decisions by the register allocator. ------------------------------------------------------------------------ Modified: llvm/branches/release_35/ (props changed) llvm/branches/release_35/test/CodeGen/X86/vec_fabs.ll Propchange: llvm/branches/release_35/ ------------------------------------------------------------------------------ --- svn:mergeinfo (original) +++ svn:mergeinfo Tue Aug 12 00:41:35 2014 @@ -1,3 +1,3 @@ /llvm/branches/Apple/Pertwee:110850,110961 /llvm/branches/type-system-rewrite:133420-134817 -/llvm/trunk:155241,213653,213665,213726,213749,213773,213793,213798-213799,213815,213847,213880,213883-213884,213894-213896,213899,213915,213966,213999,214060,214129,214180,214287,214331,214423,214429,214519,214670,214674 +/llvm/trunk:155241,213653,213665,213726,213749,213773,213793,213798-213799,213815,213847,213880,213883-213884,213894-213896,213899,213915,213966,213999,214060,214129,214180,214287,214331,214423,214429,214519,214670,214674,214679 Modified: llvm/branches/release_35/test/CodeGen/X86/vec_fabs.ll URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_35/test/CodeGen/X86/vec_fabs.ll?rev=215430&r1=215429&r2=215430&view=diff ============================================================================== --- llvm/branches/release_35/test/CodeGen/X86/vec_fabs.ll (original) +++ llvm/branches/release_35/test/CodeGen/X86/vec_fabs.ll Tue Aug 12 00:41:35 2014 @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+avx | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=corei7-avx | FileCheck %s define <2 x double> @fabs_v2f64(<2 x double> %p) @@ -39,18 +39,16 @@ declare <8 x float> @llvm.fabs.v8f32(<8 ; PR20354: when generating code for a vector fabs op, ; make sure the correct mask is used for all vector elements. -; CHECK-LABEL: LCPI4_0 -; CHECK: .long 2147483648 -; CHECK: .long 2147483648 -; CHECK-LABEL: LCPI4_1 -; CHECK: .long 2147483647 -; CHECK: .long 2147483647 -; CHECK-LABEL: fabs_v2f32_1 -; CHECK: vmovdqa {{.*}}LCPI4_0, %xmm0 -; CHECK: vpand {{.*}}LCPI4_1, %xmm0, %xmm0 -; CHECK: vmovd %xmm0, %eax -; CHECK: vpextrd $1, %xmm0, %edx -define i64 @fabs_v2f32_1() { +; CHECK-LABEL: .LCPI4_0: +; CHECK-NEXT: .long 2147483647 +; CHECK-NEXT: .long 2147483647 +define i64 @fabs_v2f32(<2 x float> %v) { +; CHECK-LABEL: fabs_v2f32: +; CHECK: movabsq $-9223372034707292160, %[[R:r[^ ]+]] +; CHECK-NEXT: vmovq %[[R]], %[[X:xmm[0-9]+]] +; CHECK-NEXT: vandps {{.*}}.LCPI4_0{{.*}}, %[[X]], %[[X]] +; CHECK-NEXT: vmovq %[[X]], %rax +; CHECK-NEXT: retq %highbits = bitcast i64 9223372039002259456 to <2 x float> ; 0x8000_0000_8000_0000 %fabs = call <2 x float> @llvm.fabs.v2f32(<2 x float> %highbits) %ret = bitcast <2 x float> %fabs to i64 _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-branch-commits