Author: tstellar
Date: Thu Apr 23 14:14:40 2015
New Revision: 235622
URL: http://llvm.org/viewvc/llvm-project?rev=235622&view=rev
Log:
Merging r229225:
------------------------------------------------------------------------
r229225 | Matthew.Arsenault | 2015-02-13 21:55:54 -0500 (Fri, 13 Feb 2015) | 4
lines
R600/SI: Add hack to copy from a VGPR to VCC
This hopefully should be fixed when VReg_1 is removed.
------------------------------------------------------------------------
Modified:
llvm/branches/release_36/lib/Target/R600/SIInstrInfo.cpp
Modified: llvm/branches/release_36/lib/Target/R600/SIInstrInfo.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/branches/release_36/lib/Target/R600/SIInstrInfo.cpp?rev=235622&r1=235621&r2=235622&view=diff
==============================================================================
--- llvm/branches/release_36/lib/Target/R600/SIInstrInfo.cpp (original)
+++ llvm/branches/release_36/lib/Target/R600/SIInstrInfo.cpp Thu Apr 23
14:14:40 2015
@@ -333,6 +333,16 @@ SIInstrInfo::copyPhysReg(MachineBasicBlo
return;
} else if (AMDGPU::SReg_64RegClass.contains(DestReg)) {
+ if (DestReg == AMDGPU::VCC) {
+ // FIXME: Hack until VReg_1 removed.
+
+ assert(AMDGPU::VGPR_32RegClass.contains(SrcReg));
+ BuildMI(MBB, MI, DL, get(AMDGPU::V_CMP_NE_I32_e32), AMDGPU::VCC)
+ .addImm(0)
+ .addReg(SrcReg, getKillRegState(KillSrc));
+ return;
+ }
+
assert(AMDGPU::SReg_64RegClass.contains(SrcReg));
BuildMI(MBB, MI, DL, get(AMDGPU::S_MOV_B64), DestReg)
.addReg(SrcReg, getKillRegState(KillSrc));
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