Author: matze Date: Mon Jan 23 13:26:12 2017 New Revision: 292820 URL: http://llvm.org/viewvc/llvm-project?rev=292820&view=rev Log: Cherry pick r292625
Added: llvm/branches/release_40/test/CodeGen/AArch64/ldst-opt.mir - copied unchanged from r292625, llvm/trunk/test/CodeGen/AArch64/ldst-opt.mir Removed: llvm/branches/release_40/test/CodeGen/AArch64/ldst-opt-dbg-limit.mir Modified: llvm/branches/release_40/ (props changed) llvm/branches/release_40/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp Propchange: llvm/branches/release_40/ ------------------------------------------------------------------------------ --- svn:mergeinfo (original) +++ svn:mergeinfo Mon Jan 23 13:26:12 2017 @@ -1,3 +1,3 @@ /llvm/branches/Apple/Pertwee:110850,110961 /llvm/branches/type-system-rewrite:133420-134817 -/llvm/trunk:155241,291858-291859,291863,291875,291966,291968,291979,292133,292242,292254-292255,292280,292583,292641,292667,292711 +/llvm/trunk:155241,291858-291859,291863,291875,291966,291968,291979,292133,292242,292254-292255,292280,292583,292625,292641,292667,292711 Modified: llvm/branches/release_40/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_40/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp?rev=292820&r1=292819&r2=292820&view=diff ============================================================================== --- llvm/branches/release_40/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp (original) +++ llvm/branches/release_40/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp Mon Jan 23 13:26:12 2017 @@ -687,9 +687,30 @@ AArch64LoadStoreOpt::mergePairedInsns(Ma MachineInstrBuilder MIB; DebugLoc DL = I->getDebugLoc(); MachineBasicBlock *MBB = I->getParent(); + MachineOperand RegOp0 = getLdStRegOp(*RtMI); + MachineOperand RegOp1 = getLdStRegOp(*Rt2MI); + // Kill flags may become invalid when moving stores for pairing. + if (RegOp0.isUse()) { + if (!MergeForward) { + // Clear kill flags on store if moving upwards. Example: + // STRWui %w0, ... + // USE %w1 + // STRWui kill %w1 ; need to clear kill flag when moving STRWui upwards + RegOp0.setIsKill(false); + RegOp1.setIsKill(false); + } else { + // Clear kill flags of the first stores register. Example: + // STRWui %w1, ... + // USE kill %w1 ; need to clear kill flag when moving STRWui downwards + // STRW %w0 + unsigned Reg = getLdStRegOp(*I).getReg(); + for (MachineInstr &MI : make_range(std::next(I), Paired)) + MI.clearRegisterKills(Reg, TRI); + } + } MIB = BuildMI(*MBB, InsertionPoint, DL, TII->get(getMatchingPairOpcode(Opc))) - .addOperand(getLdStRegOp(*RtMI)) - .addOperand(getLdStRegOp(*Rt2MI)) + .addOperand(RegOp0) + .addOperand(RegOp1) .addOperand(BaseRegOp) .addImm(OffsetImm) .setMemRefs(I->mergeMemRefsWith(*Paired)); Removed: llvm/branches/release_40/test/CodeGen/AArch64/ldst-opt-dbg-limit.mir URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_40/test/CodeGen/AArch64/ldst-opt-dbg-limit.mir?rev=292819&view=auto ============================================================================== --- llvm/branches/release_40/test/CodeGen/AArch64/ldst-opt-dbg-limit.mir (original) +++ llvm/branches/release_40/test/CodeGen/AArch64/ldst-opt-dbg-limit.mir (removed) @@ -1,133 +0,0 @@ -# RUN: llc -run-pass=aarch64-ldst-opt %s -o - 2>&1 | FileCheck %s ---- | - target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128" - target triple = "aarch64--linux-gnu" - - ; Function Attrs: nounwind - define i16 @promote-load-from-store(i32* %dst, i32 %x) #0 { - store i32 %x, i32* %dst - %dst16 = bitcast i32* %dst to i16* - %dst1 = getelementptr inbounds i16, i16* %dst16, i32 1 - %x16 = load i16, i16* %dst1 - ret i16 %x16 - } - - ; Function Attrs: nounwind - define void @store-pair(i32* %dst, i32 %x, i32 %y) #0 { - %dst01 = bitcast i32* %dst to i32* - %dst1 = getelementptr inbounds i32, i32* %dst, i32 1 - store i32 %x, i32* %dst01 - store i32 %x, i32* %dst1 - ret void - } - - attributes #0 = { nounwind } - -... ---- -name: promote-load-from-store -alignment: 2 -exposesReturnsTwice: false -tracksRegLiveness: true -liveins: - - { reg: '%x0' } - - { reg: '%w1' } -frameInfo: - isFrameAddressTaken: false - isReturnAddressTaken: false - hasStackMap: false - hasPatchPoint: false - stackSize: 0 - offsetAdjustment: 0 - maxAlignment: 0 - adjustsStack: false - hasCalls: false - maxCallFrameSize: 0 - hasOpaqueSPAdjustment: false - hasVAStart: false - hasMustTailInVarArgFunc: false -body: | - bb.0 (%ir-block.0): - liveins: %w1, %x0, %lr - - STRWui killed %w1, %x0, 0 :: (store 4 into %ir.dst) - CFI_INSTRUCTION 0 - CFI_INSTRUCTION 0 - CFI_INSTRUCTION 0 - CFI_INSTRUCTION 0 - CFI_INSTRUCTION 0 - CFI_INSTRUCTION 0 - CFI_INSTRUCTION 0 - CFI_INSTRUCTION 0 - CFI_INSTRUCTION 0 - CFI_INSTRUCTION 0 - CFI_INSTRUCTION 0 - CFI_INSTRUCTION 0 - CFI_INSTRUCTION 0 - CFI_INSTRUCTION 0 - CFI_INSTRUCTION 0 - CFI_INSTRUCTION 0 - CFI_INSTRUCTION 0 - CFI_INSTRUCTION 0 - CFI_INSTRUCTION 0 - CFI_INSTRUCTION 0 - %w0 = LDRHHui killed %x0, 1 :: (load 2 from %ir.dst1) - RET %lr, implicit %w0 - -... -# CHECK-LABEL: name: promote-load-from-store -# CHECK: STRWui %w1 -# CHECK: UBFMWri %w1 ---- -name: store-pair -alignment: 2 -exposesReturnsTwice: false -tracksRegLiveness: true -liveins: - - { reg: '%x0' } - - { reg: '%w1' } -frameInfo: - isFrameAddressTaken: false - isReturnAddressTaken: false - hasStackMap: false - hasPatchPoint: false - stackSize: 0 - offsetAdjustment: 0 - maxAlignment: 0 - adjustsStack: false - hasCalls: false - maxCallFrameSize: 0 - hasOpaqueSPAdjustment: false - hasVAStart: false - hasMustTailInVarArgFunc: false -body: | - bb.0 (%ir-block.0): - liveins: %w1, %x0, %lr - - STRWui %w1, %x0, 0 :: (store 4 into %ir.dst01) - CFI_INSTRUCTION 0 - CFI_INSTRUCTION 0 - CFI_INSTRUCTION 0 - CFI_INSTRUCTION 0 - CFI_INSTRUCTION 0 - CFI_INSTRUCTION 0 - CFI_INSTRUCTION 0 - CFI_INSTRUCTION 0 - CFI_INSTRUCTION 0 - CFI_INSTRUCTION 0 - CFI_INSTRUCTION 0 - CFI_INSTRUCTION 0 - CFI_INSTRUCTION 0 - CFI_INSTRUCTION 0 - CFI_INSTRUCTION 0 - CFI_INSTRUCTION 0 - CFI_INSTRUCTION 0 - CFI_INSTRUCTION 0 - CFI_INSTRUCTION 0 - CFI_INSTRUCTION 0 - STRWui killed %w1, killed %x0, 1 :: (store 4 into %ir.dst1) - RET %lr - -... -# CHECK-LABEL: name: store-pair -# CHECK: STPWi _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits