Author: hans Date: Thu Sep 6 01:58:13 2018 New Revision: 341530 URL: http://llvm.org/viewvc/llvm-project?rev=341530&view=rev Log: Merging r341512: ------------------------------------------------------------------------ r341512 | ctopper | 2018-09-06 04:03:14 +0200 (Thu, 06 Sep 2018) | 7 lines
[X86][Assembler] Allow %eip as a register in 32-bit mode for .cfi directives. This basically reverts a change made in r336217, but improves the text of the error message for not allowing IP-relative addressing in 32-bit mode. Fixes PR38826. Patch by Iain Sandoe. ------------------------------------------------------------------------ Added: llvm/branches/release_70/test/MC/X86/pr38826.s - copied unchanged from r341512, llvm/trunk/test/MC/X86/pr38826.s Modified: llvm/branches/release_70/ (props changed) llvm/branches/release_70/lib/Target/X86/AsmParser/X86AsmParser.cpp llvm/branches/release_70/test/CodeGen/X86/eip-addressing-i386.ll llvm/branches/release_70/test/MC/X86/x86_errors.s Propchange: llvm/branches/release_70/ ------------------------------------------------------------------------------ --- svn:mergeinfo (original) +++ svn:mergeinfo Thu Sep 6 01:58:13 2018 @@ -1,3 +1,3 @@ /llvm/branches/Apple/Pertwee:110850,110961 /llvm/branches/type-system-rewrite:133420-134817 -/llvm/trunk:155241,338552,338554,338569,338599,338610,338658,338665,338682,338703,338709,338716,338751,338762,338817,338841,338902,338915,338968,339073,339091,339166,339179,339184,339190,339225,339316,339319,339411,339492,339515,339533,339535-339536,339600,339636,339674,339769,339822,339883,339895-339896,339945,340158,340303,340416-340417,340455,340641,340691,340751,340820,340839,340900,340959,341094,341244,341416 +/llvm/trunk:155241,338552,338554,338569,338599,338610,338658,338665,338682,338703,338709,338716,338751,338762,338817,338841,338902,338915,338968,339073,339091,339166,339179,339184,339190,339225,339316,339319,339411,339492,339515,339533,339535-339536,339600,339636,339674,339769,339822,339883,339895-339896,339945,340158,340303,340416-340417,340455,340641,340691,340751,340820,340839,340900,340959,341094,341244,341416,341512 Modified: llvm/branches/release_70/lib/Target/X86/AsmParser/X86AsmParser.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_70/lib/Target/X86/AsmParser/X86AsmParser.cpp?rev=341530&r1=341529&r2=341530&view=diff ============================================================================== --- llvm/branches/release_70/lib/Target/X86/AsmParser/X86AsmParser.cpp (original) +++ llvm/branches/release_70/lib/Target/X86/AsmParser/X86AsmParser.cpp Thu Sep 6 01:58:13 2018 @@ -1054,7 +1054,7 @@ static bool CheckBaseRegAndIndexRegAndSc // RIP/EIP-relative addressing is only supported in 64-bit mode. if (!Is64BitMode && BaseReg != 0 && (BaseReg == X86::RIP || BaseReg == X86::EIP)) { - ErrMsg = "RIP-relative addressing requires 64-bit mode"; + ErrMsg = "IP-relative addressing requires 64-bit mode"; return true; } @@ -1099,7 +1099,7 @@ bool X86AsmParser::ParseRegister(unsigne // checked. // FIXME: Check AH, CH, DH, BH cannot be used in an instruction requiring a // REX prefix. - if (RegNo == X86::RIZ || RegNo == X86::RIP || RegNo == X86::EIP || + if (RegNo == X86::RIZ || RegNo == X86::RIP || X86MCRegisterClasses[X86::GR64RegClassID].contains(RegNo) || X86II::isX86_64NonExtLowByteReg(RegNo) || X86II::isX86_64ExtendedReg(RegNo)) Modified: llvm/branches/release_70/test/CodeGen/X86/eip-addressing-i386.ll URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_70/test/CodeGen/X86/eip-addressing-i386.ll?rev=341530&r1=341529&r2=341530&view=diff ============================================================================== --- llvm/branches/release_70/test/CodeGen/X86/eip-addressing-i386.ll (original) +++ llvm/branches/release_70/test/CodeGen/X86/eip-addressing-i386.ll Thu Sep 6 01:58:13 2018 @@ -1,8 +1,8 @@ ; RUN: not llc -mtriple i386-apple-- -o /dev/null < %s 2>&1| FileCheck %s -; CHECK: <inline asm>:1:13: error: register %eip is only available in 64-bit mode +; CHECK: <inline asm>:1:13: error: IP-relative addressing requires 64-bit mode ; CHECK-NEXT: jmpl *_foo(%eip) -; Make sure that we emit an error if we encounter RIP-relative instructions in +; Make sure that we emit an error if we encounter IP-relative instructions in ; 32-bit mode. define i32 @foo() { ret i32 0 } Modified: llvm/branches/release_70/test/MC/X86/x86_errors.s URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_70/test/MC/X86/x86_errors.s?rev=341530&r1=341529&r2=341530&view=diff ============================================================================== --- llvm/branches/release_70/test/MC/X86/x86_errors.s (original) +++ llvm/branches/release_70/test/MC/X86/x86_errors.s Thu Sep 6 01:58:13 2018 @@ -103,11 +103,11 @@ lea (%si,%bx), %ax // 64: error: invalid 16-bit base register lea (%di,%bx), %ax -// 32: error: register %eip is only available in 64-bit mode +// 32: error: invalid base+index expression // 64: error: invalid base+index expression mov (,%eip), %rbx -// 32: error: register %eip is only available in 64-bit mode +// 32: error: invalid base+index expression // 64: error: invalid base+index expression mov (%eip,%eax), %rbx _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits