Author: Nemanja Ivanovic Date: 2020-07-27T16:26:05+02:00 New Revision: eb3f43bb3a472cbd4dd71b6c7acdf9a298990c29
URL: https://github.com/llvm/llvm-project/commit/eb3f43bb3a472cbd4dd71b6c7acdf9a298990c29 DIFF: https://github.com/llvm/llvm-project/commit/eb3f43bb3a472cbd4dd71b6c7acdf9a298990c29.diff LOG: [PowerPC][NFC] Fix an assert that cannot trip from 7d076e19e31a I mixed up the precedence of operators in the assert and thought I had it right since there was no compiler warning. This just adds the parentheses in the expression as needed. (cherry picked from commit cdead4f89c0eecf11f50092bc088e3a9c6511825) Added: Modified: llvm/lib/Target/PowerPC/PPCISelLowering.cpp Removed: ################################################################################ diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp index 980b5ea2fb7d..5c1a4cb16568 100644 --- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp @@ -9292,7 +9292,8 @@ SDValue PPCTargetLowering::LowerBUILD_VECTOR(SDValue Op, if (!BVNIsConstantSplat || SplatBitSize > 32) { bool IsPermutedLoad = false; - const SDValue *InputLoad = getNormalLoadInput(Op.getOperand(0), IsPermutedLoad); + const SDValue *InputLoad = + getNormalLoadInput(Op.getOperand(0), IsPermutedLoad); // Handle load-and-splat patterns as we have instructions that will do this // in one go. if (InputLoad && DAG.isSplatValue(Op, true)) { @@ -9930,7 +9931,7 @@ SDValue PPCTargetLowering::LowerVECTOR_SHUFFLE(SDValue Op, if (IsPermutedLoad) { assert(isLittleEndian && "Unexpected permuted load on big endian target"); SplatIdx += IsFourByte ? 2 : 1; - assert(SplatIdx < IsFourByte ? 4 : 2 && + assert((SplatIdx < (IsFourByte ? 4 : 2)) && "Splat of a value outside of the loaded memory"); } _______________________________________________ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
