Author: Alexey Bataev Date: 2020-12-07T06:12:05-08:00 New Revision: 97c08db84e3a7eb4eba1eab2678f6f68c2afaca3
URL: https://github.com/llvm/llvm-project/commit/97c08db84e3a7eb4eba1eab2678f6f68c2afaca3 DIFF: https://github.com/llvm/llvm-project/commit/97c08db84e3a7eb4eba1eab2678f6f68c2afaca3.diff LOG: [SLP]Update test checks, NFC. Added: Modified: llvm/test/Transforms/SLPVectorizer/AArch64/PR38339.ll Removed: ################################################################################ diff --git a/llvm/test/Transforms/SLPVectorizer/AArch64/PR38339.ll b/llvm/test/Transforms/SLPVectorizer/AArch64/PR38339.ll index 1a981a32804b..16e5da0a7e43 100644 --- a/llvm/test/Transforms/SLPVectorizer/AArch64/PR38339.ll +++ b/llvm/test/Transforms/SLPVectorizer/AArch64/PR38339.ll @@ -9,7 +9,7 @@ define void @f1(<2 x i16> %x, i16* %a) { ; CHECK-NEXT: [[PTR2:%.*]] = getelementptr inbounds [4 x i16], [4 x i16]* undef, i16 0, i16 2 ; CHECK-NEXT: [[PTR3:%.*]] = getelementptr inbounds [4 x i16], [4 x i16]* undef, i16 0, i16 3 ; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x i16> [[SHUFFLE]], i32 0 -; CHECK-NEXT: store i16 [[TMP1]], i16* [[A:%.*]] +; CHECK-NEXT: store i16 [[TMP1]], i16* [[A:%.*]], align 2 ; CHECK-NEXT: [[TMP2:%.*]] = bitcast i16* [[PTR0]] to <4 x i16>* ; CHECK-NEXT: store <4 x i16> [[SHUFFLE]], <4 x i16>* [[TMP2]], align 2 ; CHECK-NEXT: ret void @@ -41,7 +41,7 @@ define void @f2(<2 x i16> %x, i16* %a) { ; CHECK-NEXT: [[PTR2:%.*]] = getelementptr inbounds [4 x i16], [4 x i16]* undef, i16 0, i16 2 ; CHECK-NEXT: [[PTR3:%.*]] = getelementptr inbounds [4 x i16], [4 x i16]* undef, i16 0, i16 3 ; CHECK-NEXT: [[TMP0:%.*]] = extractelement <4 x i16> [[SHUFFLE]], i32 0 -; CHECK-NEXT: store i16 [[TMP0]], i16* [[A]] +; CHECK-NEXT: store i16 [[TMP0]], i16* [[A]], align 2 ; CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[PTR0]] to <4 x i16>* ; CHECK-NEXT: store <4 x i16> [[SHUFFLE]], <4 x i16>* [[TMP1]], align 2 ; CHECK-NEXT: [[A_VAL:%.*]] = load i16, i16* [[A]], align 2 @@ -89,7 +89,7 @@ define void @f3(<2 x i16> %x, i16* %a) { ; CHECK-NEXT: [[PTR2:%.*]] = getelementptr inbounds [4 x i16], [4 x i16]* undef, i16 0, i16 2 ; CHECK-NEXT: [[PTR3:%.*]] = getelementptr inbounds [4 x i16], [4 x i16]* undef, i16 0, i16 3 ; CHECK-NEXT: [[TMP0:%.*]] = extractelement <4 x i16> [[SHUFFLE]], i32 0 -; CHECK-NEXT: store i16 [[TMP0]], i16* [[A]] +; CHECK-NEXT: store i16 [[TMP0]], i16* [[A]], align 2 ; CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[PTR0]] to <4 x i16>* ; CHECK-NEXT: store <4 x i16> [[SHUFFLE]], <4 x i16>* [[TMP1]], align 2 ; CHECK-NEXT: [[A_VAL:%.*]] = load i16, i16* [[A]], align 2 _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
