Author: Tres Popp Date: 2020-12-15T18:47:49+01:00 New Revision: 9adc64539f97e531b865e4864b9965b0a99fd70f
URL: https://github.com/llvm/llvm-project/commit/9adc64539f97e531b865e4864b9965b0a99fd70f DIFF: https://github.com/llvm/llvm-project/commit/9adc64539f97e531b865e4864b9965b0a99fd70f.diff LOG: [mlir] Add std.powf to ROCDL lowering. Differential Revision: https://reviews.llvm.org/D93313 Added: Modified: mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir Removed: ################################################################################ diff --git a/mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp b/mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp index b6f4238a4a5e..e87ca62c9b81 100644 --- a/mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp +++ b/mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp @@ -84,7 +84,7 @@ void mlir::configureGpuToROCDLConversionLegality(ConversionTarget &target) { target.addIllegalDialect<gpu::GPUDialect>(); target.addIllegalOp<LLVM::CosOp, LLVM::ExpOp, LLVM::FAbsOp, LLVM::FCeilOp, LLVM::FFloorOp, LLVM::LogOp, LLVM::Log10Op, LLVM::Log2Op, - LLVM::SinOp, LLVM::SqrtOp>(); + LLVM::PowOp, LLVM::SinOp, LLVM::SqrtOp>(); // TODO: Remove once we support replacing non-root ops. target.addLegalOp<gpu::YieldOp, gpu::GPUModuleOp, gpu::ModuleEndOp>(); @@ -123,6 +123,8 @@ void mlir::populateGpuToROCDLConversionPatterns( "__ocml_log10_f64"); patterns.insert<OpToFuncCallLowering<Log2Op>>(converter, "__ocml_log2_f32", "__ocml_log2_f64"); + patterns.insert<OpToFuncCallLowering<PowFOp>>(converter, "__ocml_pow_f32", + "__ocml_pow_f64"); patterns.insert<OpToFuncCallLowering<RsqrtOp>>(converter, "__ocml_rsqrt_f32", "__ocml_rsqrt_f64"); patterns.insert<OpToFuncCallLowering<SinOp>>(converter, "__ocml_sin_f32", diff --git a/mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir b/mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir index c57f98571df6..dc23d436cab5 100644 --- a/mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir +++ b/mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir @@ -310,3 +310,18 @@ gpu.module @test_module { std.return %result32, %result64 : f32, f64 } } + +// ----- + +gpu.module @test_module { + // CHECK: llvm.func @__ocml_pow_f32(!llvm.float, !llvm.float) -> !llvm.float + // CHECK: llvm.func @__ocml_pow_f64(!llvm.double, !llvm.double) -> !llvm.double + // CHECK-LABEL: func @gpu_pow + func @gpu_pow(%arg_f32 : f32, %arg_f64 : f64) -> (f32, f64) { + %result32 = std.powf %arg_f32, %arg_f32 : f32 + // CHECK: llvm.call @__ocml_pow_f32(%{{.*}}, %{{.*}}) : (!llvm.float, !llvm.float) -> !llvm.float + %result64 = std.powf %arg_f64, %arg_f64 : f64 + // CHECK: llvm.call @__ocml_pow_f64(%{{.*}}, %{{.*}}) : (!llvm.double, !llvm.double) -> !llvm.double + std.return %result32, %result64 : f32, f64 + } +} _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
