Author: Matt Arsenault Date: 2021-01-07T17:40:34-05:00 New Revision: 2cbbc6e87c4b565a54c9bb85e34d464acb608f16
URL: https://github.com/llvm/llvm-project/commit/2cbbc6e87c4b565a54c9bb85e34d464acb608f16 DIFF: https://github.com/llvm/llvm-project/commit/2cbbc6e87c4b565a54c9bb85e34d464acb608f16.diff LOG: GlobalISel: Fail legalization on narrowing extload below memory size Added: Modified: llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sextload-global.mir llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-zextload-global.mir Removed: ################################################################################ diff --git a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp index 7b346a1bbbec..61b2611866f2 100644 --- a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp +++ b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp @@ -962,10 +962,15 @@ LegalizerHelper::LegalizeResult LegalizerHelper::narrowScalar(MachineInstr &MI, Register TmpReg = MRI.createGenericVirtualRegister(NarrowTy); auto &MMO = **MI.memoperands_begin(); - if (MMO.getSizeInBits() == NarrowSize) { + unsigned MemSize = MMO.getSizeInBits(); + + if (MemSize == NarrowSize) { MIRBuilder.buildLoad(TmpReg, PtrReg, MMO); - } else { + } else if (MemSize < NarrowSize) { MIRBuilder.buildLoadInstr(MI.getOpcode(), TmpReg, PtrReg, MMO); + } else if (MemSize > NarrowSize) { + // FIXME: Need to split the load. + return UnableToLegalize; } if (ZExt) diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sextload-global.mir b/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sextload-global.mir index b6633adbd79c..236dcf42f851 100644 --- a/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sextload-global.mir +++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sextload-global.mir @@ -11,6 +11,7 @@ # ERR-NEXT: remark: <unknown>:0:0: unable to legalize instruction: %1:_(<2 x s32>) = G_SEXTLOAD %0:_(p1) :: (load 4, addrspace 1) (in function: test_sextload_global_v2i32_from_4) # ERR-NEXT: remark: <unknown>:0:0: unable to legalize instruction: %1:_(<2 x s64>) = G_SEXTLOAD %0:_(p1) :: (load 4, addrspace 1) (in function: test_sextload_global_v2i64_from_4) # ERR-NEXT: remark: <unknown>:0:0: unable to legalize instruction: %1:_(<2 x s64>) = G_SEXTLOAD %0:_(p1) :: (load 8, addrspace 1) (in function: test_sextload_global_v2i64_from_8) +# ERR-NEXT: remark: <unknown>:0:0: unable to legalize instruction: %1:_(s128) = G_SEXTLOAD %0:_(p1) :: (load 8, addrspace 1) (in function: test_sextload_global_s128_8) # ERR-NOT: remark --- @@ -315,3 +316,22 @@ body: | %1:_(<2 x s64>) = G_SEXTLOAD %0 :: (load 8, addrspace 1) $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1 ... + +--- +name: test_sextload_global_s128_8 +body: | + bb.0: + liveins: $vgpr0_vgpr1 + + ; GFX8-LABEL: name: test_sextload_global_s128_8 + ; GFX8: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 + ; GFX8: [[SEXTLOAD:%[0-9]+]]:_(s128) = G_SEXTLOAD [[COPY]](p1) :: (load 8, addrspace 1) + ; GFX8: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[SEXTLOAD]](s128) + ; GFX6-LABEL: name: test_sextload_global_s128_8 + ; GFX6: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 + ; GFX6: [[SEXTLOAD:%[0-9]+]]:_(s128) = G_SEXTLOAD [[COPY]](p1) :: (load 8, addrspace 1) + ; GFX6: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[SEXTLOAD]](s128) + %0:_(p1) = COPY $vgpr0_vgpr1 + %1:_(s128) = G_SEXTLOAD %0 :: (load 8, addrspace 1) + $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1 +... diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-zextload-global.mir b/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-zextload-global.mir index 80ea67233550..4177d2e2bba7 100644 --- a/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-zextload-global.mir +++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-zextload-global.mir @@ -11,6 +11,7 @@ # ERR-NEXT: remark: <unknown>:0:0: unable to legalize instruction: %1:_(<2 x s32>) = G_ZEXTLOAD %0:_(p1) :: (load 4, addrspace 1) (in function: test_zextload_global_v2i32_from_4) # ERR-NEXT: remark: <unknown>:0:0: unable to legalize instruction: %1:_(<2 x s64>) = G_ZEXTLOAD %0:_(p1) :: (load 4, addrspace 1) (in function: test_zextload_global_v2i64_from_4) # ERR-NEXT: remark: <unknown>:0:0: unable to legalize instruction: %1:_(<2 x s64>) = G_ZEXTLOAD %0:_(p1) :: (load 8, addrspace 1) (in function: test_zextload_global_v2i64_from_8) +# ERR-NEXT: remark: <unknown>:0:0: unable to legalize instruction: %1:_(s128) = G_ZEXTLOAD %0:_(p1) :: (load 8, addrspace 1) (in function: test_zextload_global_s128_8) # ERR-NOT: remark --- @@ -315,3 +316,22 @@ body: | %1:_(<2 x s64>) = G_ZEXTLOAD %0 :: (load 8, addrspace 1) $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1 ... + +--- +name: test_zextload_global_s128_8 +body: | + bb.0: + liveins: $vgpr0_vgpr1 + + ; GFX8-LABEL: name: test_zextload_global_s128_8 + ; GFX8: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 + ; GFX8: [[ZEXTLOAD:%[0-9]+]]:_(s128) = G_ZEXTLOAD [[COPY]](p1) :: (load 8, addrspace 1) + ; GFX8: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[ZEXTLOAD]](s128) + ; GFX6-LABEL: name: test_zextload_global_s128_8 + ; GFX6: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 + ; GFX6: [[ZEXTLOAD:%[0-9]+]]:_(s128) = G_ZEXTLOAD [[COPY]](p1) :: (load 8, addrspace 1) + ; GFX6: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[ZEXTLOAD]](s128) + %0:_(p1) = COPY $vgpr0_vgpr1 + %1:_(s128) = G_ZEXTLOAD %0 :: (load 8, addrspace 1) + $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1 +... _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits