Author: Simon Pilgrim Date: 2021-02-16T16:57:27-08:00 New Revision: fa9dc0c60cbc25b9fc4c6c5ff5f4ba81c7a612b4
URL: https://github.com/llvm/llvm-project/commit/fa9dc0c60cbc25b9fc4c6c5ff5f4ba81c7a612b4 DIFF: https://github.com/llvm/llvm-project/commit/fa9dc0c60cbc25b9fc4c6c5ff5f4ba81c7a612b4.diff LOG: [X86][AVX] Add missing VEX_WIG tags from VPACKUSDW/VPHSUBD/VPCMPISTRI/VPCMPISTRM/VPCMPESTRI/VPCMPESTRM Fixes PR48877 Differential Revision: https://reviews.llvm.org/D95801 (cherry picked from commit 4d904776a77aa80342c65cf72a962920cc9d1fa9) Added: Modified: llvm/lib/Target/X86/X86InstrSSE.td llvm/test/MC/Disassembler/X86/x86-64-avx.txt llvm/test/MC/Disassembler/X86/x86-64-avx2.txt Removed: ################################################################################ diff --git a/llvm/lib/Target/X86/X86InstrSSE.td b/llvm/lib/Target/X86/X86InstrSSE.td index 7cf555748c46..a185a2007b72 100644 --- a/llvm/lib/Target/X86/X86InstrSSE.td +++ b/llvm/lib/Target/X86/X86InstrSSE.td @@ -3778,7 +3778,7 @@ let Predicates = [HasAVX, NoVLX_Or_NoBWI] in { VEX_4V, VEX_WIG; defm VPACKUSDW : sse4_pack<0x2B, "vpackusdw", v8i16, v4i32, X86Packus, VR128, i128mem, SchedWriteShuffle.XMM, load, 0>, - VEX_4V; + VEX_4V, VEX_WIG; } let Predicates = [HasAVX2, NoVLX_Or_NoBWI] in { @@ -3794,7 +3794,7 @@ let Predicates = [HasAVX2, NoVLX_Or_NoBWI] in { VEX_4V, VEX_L, VEX_WIG; defm VPACKUSDWY : sse4_pack<0x2B, "vpackusdw", v16i16, v8i32, X86Packus, VR256, i256mem, SchedWriteShuffle.YMM, load, 0>, - VEX_4V, VEX_L; + VEX_4V, VEX_L, VEX_WIG; } let Constraints = "$src1 = $dst" in { @@ -4756,7 +4756,7 @@ let isCommutable = 0 in { SchedWritePHAdd.XMM, 0>, VEX_4V, VEX_WIG; defm VPHSUBD : SS3I_binop_rm<0x06, "vphsubd", X86hsub, v4i32, v4i32, VR128, load, i128mem, - SchedWritePHAdd.XMM, 0>, VEX_4V; + SchedWritePHAdd.XMM, 0>, VEX_4V, VEX_WIG; defm VPSIGNB : SS3I_binop_rm_int<0x08, "vpsignb", int_x86_ssse3_psign_b_128, SchedWriteVecALU.XMM, load, 0>, VEX_4V, VEX_WIG; @@ -4802,7 +4802,7 @@ let isCommutable = 0 in { SchedWritePHAdd.YMM, 0>, VEX_4V, VEX_L, VEX_WIG; defm VPHSUBDY : SS3I_binop_rm<0x06, "vphsubd", X86hsub, v8i32, v8i32, VR256, load, i256mem, - SchedWritePHAdd.YMM, 0>, VEX_4V, VEX_L; + SchedWritePHAdd.YMM, 0>, VEX_4V, VEX_L, VEX_WIG; defm VPSIGNB : SS3I_binop_rm_int_y<0x08, "vpsignb", int_x86_avx2_psign_b, SchedWriteVecALU.YMM>, VEX_4V, VEX_L, VEX_WIG; defm VPSIGNW : SS3I_binop_rm_int_y<0x09, "vpsignw", int_x86_avx2_psign_w, @@ -6503,7 +6503,7 @@ multiclass pcmpistrm_SS42AI<string asm> { let Defs = [XMM0, EFLAGS], hasSideEffects = 0 in { let Predicates = [HasAVX] in - defm VPCMPISTRM : pcmpistrm_SS42AI<"vpcmpistrm">, VEX; + defm VPCMPISTRM : pcmpistrm_SS42AI<"vpcmpistrm">, VEX, VEX_WIG; defm PCMPISTRM : pcmpistrm_SS42AI<"pcmpistrm"> ; } @@ -6521,7 +6521,7 @@ multiclass SS42AI_pcmpestrm<string asm> { let Defs = [XMM0, EFLAGS], Uses = [EAX, EDX], hasSideEffects = 0 in { let Predicates = [HasAVX] in - defm VPCMPESTRM : SS42AI_pcmpestrm<"vpcmpestrm">, VEX; + defm VPCMPESTRM : SS42AI_pcmpestrm<"vpcmpestrm">, VEX, VEX_WIG; defm PCMPESTRM : SS42AI_pcmpestrm<"pcmpestrm">; } @@ -6539,7 +6539,7 @@ multiclass SS42AI_pcmpistri<string asm> { let Defs = [ECX, EFLAGS], hasSideEffects = 0 in { let Predicates = [HasAVX] in - defm VPCMPISTRI : SS42AI_pcmpistri<"vpcmpistri">, VEX; + defm VPCMPISTRI : SS42AI_pcmpistri<"vpcmpistri">, VEX, VEX_WIG; defm PCMPISTRI : SS42AI_pcmpistri<"pcmpistri">; } @@ -6557,7 +6557,7 @@ multiclass SS42AI_pcmpestri<string asm> { let Defs = [ECX, EFLAGS], Uses = [EAX, EDX], hasSideEffects = 0 in { let Predicates = [HasAVX] in - defm VPCMPESTRI : SS42AI_pcmpestri<"vpcmpestri">, VEX; + defm VPCMPESTRI : SS42AI_pcmpestri<"vpcmpestri">, VEX, VEX_WIG; defm PCMPESTRI : SS42AI_pcmpestri<"pcmpestri">; } diff --git a/llvm/test/MC/Disassembler/X86/x86-64-avx.txt b/llvm/test/MC/Disassembler/X86/x86-64-avx.txt index 9ebb5335a22d..b7ab0b1a7dc6 100644 --- a/llvm/test/MC/Disassembler/X86/x86-64-avx.txt +++ b/llvm/test/MC/Disassembler/X86/x86-64-avx.txt @@ -3,17 +3,35 @@ # CHECK: vpackusdw (%rax), %xmm2, %xmm1 0xc4 0xe2 0x69 0x2b 0x08 +# CHECK: vpackusdw (%rax), %xmm2, %xmm1 +0xc4 0xe2 0xe9 0x2b 0x08 + # CHECK: vphsubd %xmm3, %xmm2, %xmm11 0xc4 0x62 0x69 0x06 0xdb +# CHECK: vphsubd %xmm3, %xmm2, %xmm11 +0xc4 0x62 0xe9 0x06 0xdb + # CHECK: vpcmpestri $100, %xmm3, %xmm11 0xc4 0x63 0x79 0x61 0xdb 0x64 +# CHECK: vpcmpestri $100, %xmm3, %xmm11 +0xc4 0x63 0xf9 0x61 0xdb 0x64 + # CHECK: vpcmpestrm $100, %xmm3, %xmm11 0xc4 0x63 0x79 0x60 0xdb 0x64 +# CHECK: vpcmpestrm $100, %xmm3, %xmm11 +0xc4 0x63 0xf9 0x60 0xdb 0x64 + # CHECK: vpcmpistri $100, %xmm3, %xmm11 0xc4 0x63 0x79 0x63 0xdb 0x64 +# CHECK: vpcmpistri $100, %xmm3, %xmm11 +0xc4 0x63 0xf9 0x63 0xdb 0x64 + # CHECK: vpcmpistrm $100, %xmm3, %xmm11 0xc4 0x63 0x79 0x62 0xdb 0x64 + +# CHECK: vpcmpistrm $100, %xmm3, %xmm11 +0xc4 0x63 0xf9 0x62 0xdb 0x64 diff --git a/llvm/test/MC/Disassembler/X86/x86-64-avx2.txt b/llvm/test/MC/Disassembler/X86/x86-64-avx2.txt index a6a87f100633..d876067654fe 100644 --- a/llvm/test/MC/Disassembler/X86/x86-64-avx2.txt +++ b/llvm/test/MC/Disassembler/X86/x86-64-avx2.txt @@ -3,5 +3,11 @@ # CHECK: vpackusdw %ymm0, %ymm2, %ymm1 0xc4 0xe2 0x6d 0x2b 0xc8 +# CHECK: vpackusdw %ymm0, %ymm2, %ymm1 +0xc4 0xe2 0xed 0x2b 0xc8 + # CHECK: vphsubd %ymm0, %ymm2, %ymm1 0xc4 0xe2 0x6d 0x06 0xc8 + +# CHECK: vphsubd %ymm0, %ymm2, %ymm1 +0xc4 0xe2 0xed 0x06 0xc8 _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
