https://github.com/boomanaiden154 updated
https://github.com/llvm/llvm-project/pull/76788
>From 0c45220a79dcada7e1d0f54490b452e02a2b8e4f Mon Sep 17 00:00:00 2001
From: Aiden Grossman <agrossman...@yahoo.com>
Date: Tue, 2 Jan 2024 22:54:35 -0800
Subject: [PATCH 1/2] [llvm-exegesis] Add additional validation counters
This patch adds support for additional types of validation counters and
also adds mappings between these new validation counter types and
physical counters on the hardware for microarchitectures that I have the
ability to test on.
---
llvm/include/llvm/Target/TargetPfmCounters.td | 7 ++++++
llvm/lib/Target/X86/X86PfmCounters.td | 10 ++++++++
.../llvm-exegesis/lib/BenchmarkResult.cpp | 24 +++++++++++++++++++
.../tools/llvm-exegesis/lib/BenchmarkResult.h | 6 +++++
llvm/tools/llvm-exegesis/llvm-exegesis.cpp | 18 +++++++++++---
5 files changed, 62 insertions(+), 3 deletions(-)
diff --git a/llvm/include/llvm/Target/TargetPfmCounters.td
b/llvm/include/llvm/Target/TargetPfmCounters.td
index d162327afea2cf..0bfefd5d31211e 100644
--- a/llvm/include/llvm/Target/TargetPfmCounters.td
+++ b/llvm/include/llvm/Target/TargetPfmCounters.td
@@ -33,6 +33,13 @@ class ValidationEvent <int event_number> {
}
def InstructionRetired : ValidationEvent<0>;
+def L1DCacheLoadMiss : ValidationEvent<1>;
+def L1DCacheStoreMiss : ValidationEvent<2>;
+def L1ICacheLoadMiss : ValidationEvent<3>;
+def DataTLBLoadMiss : ValidationEvent<4>;
+def DataTLBStoreMiss : ValidationEvent<5>;
+def InstructionTLBLoadMiss : ValidationEvent<6>;
+
// Validation counters can be tied to a specific event
class PfmValidationCounter<ValidationEvent event_type, string counter>
diff --git a/llvm/lib/Target/X86/X86PfmCounters.td
b/llvm/lib/Target/X86/X86PfmCounters.td
index 48d68954970915..e6b8cdc430e549 100644
--- a/llvm/lib/Target/X86/X86PfmCounters.td
+++ b/llvm/lib/Target/X86/X86PfmCounters.td
@@ -20,6 +20,11 @@ def : PfmCountersDefaultBinding<DefaultPfmCounters>;
// Intel X86 Counters.
defvar DefaultIntelPfmValidationCounters = [
PfmValidationCounter<InstructionRetired, "INSTRUCTIONS_RETIRED">
+ PfmValidationCounter<L1DCacheLoadMiss, "MEM_LOAD_UOPS_RETIRED:L1_MISS">,
+ PfmValidationCounter<L1ICacheLoadMiss, "L1-ICACHE-LOAD-MISSES">,
+ PfmValidationCounter<DataTLBLoadMiss, "DTLB_LOAD_MISSES:MISS_CAUSES_A_WALK">,
+ PfmValidationCounter<DataTLBStoreMiss,
"DTLB_STORE_MISSES:MISS_CAUSES_A_WALK">,
+ PfmValidationCounter<InstructionTLBLoadMiss,
"ITLB_MISSES:MISS_CAUSES_A_WALK">
];
def PentiumPfmCounters : ProcPfmCounters {
@@ -201,6 +206,11 @@ def : PfmCountersBinding<"tigerlake", IceLakePfmCounters>;
// AMD X86 Counters.
defvar DefaultAMDPfmValidationCounters = [
PfmValidationCounter<InstructionRetired, "RETIRED_INSTRUCTIONS">
+ PfmValidationCounter<L1DCacheLoadMiss, "L1-DCACHE-LOAD-MISSES">,
+ PfmValidationCounter<L1DCacheStoreMiss, "L1-DCACHE-STORE-MISSES">,
+ PfmValidationCounter<L1ICacheLoadMiss, "L1-ICACHE-LOAD-MISSES">,
+ PfmValidationCounter<DataTLBLoadMiss, "DTLB-LOAD-MISSES">,
+ PfmValidationCounter<InstructionTLBLoadMiss, "ITLB-LOAD-MISSES">
];
// Set basic counters for AMD cpus that we know libpfm4 supports.
diff --git a/llvm/tools/llvm-exegesis/lib/BenchmarkResult.cpp
b/llvm/tools/llvm-exegesis/lib/BenchmarkResult.cpp
index d3f69beb19c46f..bec96c13672782 100644
--- a/llvm/tools/llvm-exegesis/lib/BenchmarkResult.cpp
+++ b/llvm/tools/llvm-exegesis/lib/BenchmarkResult.cpp
@@ -197,12 +197,36 @@ const char
*validationEventToString(exegesis::ValidationEvent VE) {
switch (VE) {
case exegesis::ValidationEvent::InstructionRetired:
return "instructions-retired";
+ case exegesis::ValidationEvent::L1DCacheLoadMiss:
+ return "l1d-cache-load-misses";
+ case exegesis::ValidationEvent::L1DCacheStoreMiss:
+ return "l1d-cache-store-misses";
+ case exegesis::ValidationEvent::L1ICacheLoadMiss:
+ return "l1i-cache-load-misses";
+ case exegesis::ValidationEvent::DataTLBLoadMiss:
+ return "data-tlb-load-misses";
+ case exegesis::ValidationEvent::DataTLBStoreMiss:
+ return "data-tlb-store-misses";
+ case exegesis::ValidationEvent::InstructionTLBLoadMiss:
+ return "instruction-tlb-load-misses";
}
}
Expected<exegesis::ValidationEvent> stringToValidationEvent(StringRef Input) {
if (Input == "instructions-retired")
return exegesis::ValidationEvent::InstructionRetired;
+ else if (Input == "l1d-cache-load-misses")
+ return exegesis::ValidationEvent::L1DCacheLoadMiss;
+ else if (Input == "l1d-cache-store-misses")
+ return exegesis::ValidationEvent::L1DCacheStoreMiss;
+ else if (Input == "l1i-cache-load-misses")
+ return exegesis::ValidationEvent::L1ICacheLoadMiss;
+ else if (Input == "data-tlb-load-misses")
+ return exegesis::ValidationEvent::DataTLBLoadMiss;
+ else if (Input == "data-tlb-store-misses")
+ return exegesis::ValidationEvent::DataTLBStoreMiss;
+ else if (Input == "instruction-tlb-load-misses")
+ return exegesis::ValidationEvent::InstructionTLBLoadMiss;
else
return make_error<StringError>("Invalid validation event string",
errc::invalid_argument);
diff --git a/llvm/tools/llvm-exegesis/lib/BenchmarkResult.h
b/llvm/tools/llvm-exegesis/lib/BenchmarkResult.h
index 9fc5d851b29abb..56d907cea0f78a 100644
--- a/llvm/tools/llvm-exegesis/lib/BenchmarkResult.h
+++ b/llvm/tools/llvm-exegesis/lib/BenchmarkResult.h
@@ -34,6 +34,12 @@ namespace exegesis {
enum ValidationEvent {
InstructionRetired,
+ L1DCacheLoadMiss,
+ L1DCacheStoreMiss,
+ L1ICacheLoadMiss,
+ DataTLBLoadMiss,
+ DataTLBStoreMiss,
+ InstructionTLBLoadMiss
};
enum class BenchmarkPhaseSelectorE {
diff --git a/llvm/tools/llvm-exegesis/llvm-exegesis.cpp
b/llvm/tools/llvm-exegesis/llvm-exegesis.cpp
index 29617532d27d86..fc19c052c35abc 100644
--- a/llvm/tools/llvm-exegesis/llvm-exegesis.cpp
+++ b/llvm/tools/llvm-exegesis/llvm-exegesis.cpp
@@ -274,9 +274,21 @@ static cl::list<ValidationEvent> ValidationCounters(
"The name of a validation counter to run concurrently with the main "
"counter to validate benchmarking assumptions"),
cl::CommaSeparated, cl::cat(BenchmarkOptions),
- cl::values(clEnumValN(ValidationEvent::InstructionRetired,
- "instructions-retired",
- "Count retired instructions")));
+ cl::values(
+ clEnumValN(ValidationEvent::InstructionRetired, "instructions-retired",
+ "Count retired instructions"),
+ clEnumValN(ValidationEvent::L1DCacheLoadMiss, "l1d-cache-load-misses",
+ "Count L1D load cache misses"),
+ clEnumValN(ValidationEvent::L1DCacheStoreMiss,
"l1d-cache-store-misses",
+ "Count L1D store cache misses"),
+ clEnumValN(ValidationEvent::L1ICacheLoadMiss, "l1i-cache-load-misses",
+ "Count L1I load cache misses"),
+ clEnumValN(ValidationEvent::DataTLBLoadMiss, "data-tlb-load-misses",
+ "Count DTLB load misses"),
+ clEnumValN(ValidationEvent::DataTLBStoreMiss, "data-tlb-store-misses",
+ "Count DTLB store misses"),
+ clEnumValN(ValidationEvent::InstructionTLBLoadMiss,
+ "instruction-tlb-load-misses", "Count ITLB load misses")));
static ExitOnError ExitOnErr("llvm-exegesis error: ");
>From d69af8f81092dcd865f064836b92254a69295c04 Mon Sep 17 00:00:00 2001
From: Aiden Grossman <agrossman...@yahoo.com>
Date: Wed, 3 Jan 2024 13:33:39 -0800
Subject: [PATCH 2/2] Add missing commas to fix build
---
llvm/lib/Target/X86/X86PfmCounters.td | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/llvm/lib/Target/X86/X86PfmCounters.td
b/llvm/lib/Target/X86/X86PfmCounters.td
index e6b8cdc430e549..da3acc5bbf56f7 100644
--- a/llvm/lib/Target/X86/X86PfmCounters.td
+++ b/llvm/lib/Target/X86/X86PfmCounters.td
@@ -19,7 +19,7 @@ def : PfmCountersDefaultBinding<DefaultPfmCounters>;
// Intel X86 Counters.
defvar DefaultIntelPfmValidationCounters = [
- PfmValidationCounter<InstructionRetired, "INSTRUCTIONS_RETIRED">
+ PfmValidationCounter<InstructionRetired, "INSTRUCTIONS_RETIRED">,
PfmValidationCounter<L1DCacheLoadMiss, "MEM_LOAD_UOPS_RETIRED:L1_MISS">,
PfmValidationCounter<L1ICacheLoadMiss, "L1-ICACHE-LOAD-MISSES">,
PfmValidationCounter<DataTLBLoadMiss, "DTLB_LOAD_MISSES:MISS_CAUSES_A_WALK">,
@@ -205,7 +205,7 @@ def : PfmCountersBinding<"tigerlake", IceLakePfmCounters>;
// AMD X86 Counters.
defvar DefaultAMDPfmValidationCounters = [
- PfmValidationCounter<InstructionRetired, "RETIRED_INSTRUCTIONS">
+ PfmValidationCounter<InstructionRetired, "RETIRED_INSTRUCTIONS">,
PfmValidationCounter<L1DCacheLoadMiss, "L1-DCACHE-LOAD-MISSES">,
PfmValidationCounter<L1DCacheStoreMiss, "L1-DCACHE-STORE-MISSES">,
PfmValidationCounter<L1ICacheLoadMiss, "L1-ICACHE-LOAD-MISSES">,
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