================ @@ -234,8 +244,15 @@ void SparcAsmPrinter::LowerGETPCXAndEmitMCInsts(const MachineInstr *MI, // add <MO>, %o7, <MO> OutStreamer->emitLabel(StartLabel); - MCOperand Callee = createPCXCallOP(EndLabel, OutContext); - EmitCall(*OutStreamer, Callee, STI); + if (!STI.getTargetTriple().isSPARC64() || + STI.hasFeature(Sparc::TuneSlowRDPC)) { + MCOperand Callee = createPCXCallOP(EndLabel, OutContext); + EmitCall(*OutStreamer, Callee, STI); + } else { + // TODO make it possible to store PC in other registers + // so that leaf function optimization becomes possible. ---------------- koachan wrote:
I'm not sure how hard would that be, especially given that there seems to be a couple places where the %o7-as-output assumption is being made... so we need to clean all of those up first, I think? https://github.com/llvm/llvm-project/pull/77196 _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits