================
@@ -6883,6 +6883,23 @@ bool AMDGPULegalizerInfo::legalizeStackSave(MachineInstr
&MI,
return true;
}
+bool AMDGPULegalizerInfo::legalizeWaveID(MachineInstr &MI,
+ MachineIRBuilder &B) const {
+ // With architected SGPRs, waveIDinGroup is in TTMP8[29:25].
+ if (!ST.hasArchitectedSGPRs())
+ return false;
+ LLT S32 = LLT::scalar(32);
+ Register DstReg = MI.getOperand(0).getReg();
+ Register TTMP8 =
+ getFunctionLiveInPhysReg(B.getMF(), B.getTII(), AMDGPU::TTMP8,
----------------
jayfoad wrote:
True, 66c710ec9dcdbdec6cadd89b972d8945983dc92f improved this to avoid adding
liveins. I wasn't going to bother backporting that since I didn't think it was
required for correctness. But I have cherry-picked it into this PR now.
https://github.com/llvm/llvm-project/pull/79839
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