llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT--> @llvm/pr-subscribers-backend-amdgpu Author: Christudasan Devadasan (cdevadas) <details> <summary>Changes</summary> --- Full diff: https://github.com/llvm/llvm-project/pull/103721.diff 7 Files Affected: - (modified) llvm/lib/Target/AMDGPU/AMDGPUCodeGenPassBuilder.cpp (+1-1) - (modified) llvm/lib/Target/AMDGPU/CMakeLists.txt (-1) - (modified) llvm/lib/Target/AMDGPU/R600CodeGenPassBuilder.cpp (+148-1) - (modified) llvm/lib/Target/AMDGPU/R600CodeGenPassBuilder.h (+37-1) - (modified) llvm/lib/Target/AMDGPU/R600ISelLowering.cpp (+1-2) - (removed) llvm/lib/Target/AMDGPU/R600TargetMachine.cpp (-154) - (removed) llvm/lib/Target/AMDGPU/R600TargetMachine.h (-60) ``````````diff diff --git a/llvm/lib/Target/AMDGPU/AMDGPUCodeGenPassBuilder.cpp b/llvm/lib/Target/AMDGPU/AMDGPUCodeGenPassBuilder.cpp index 0d7233432fc2b..8fbd672c2ad62 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUCodeGenPassBuilder.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPUCodeGenPassBuilder.cpp @@ -32,8 +32,8 @@ #include "GCNSchedStrategy.h" #include "GCNVOPDUtils.h" #include "R600.h" +#include "R600CodeGenPassBuilder.h" #include "R600MachineFunctionInfo.h" -#include "R600TargetMachine.h" #include "SIFixSGPRCopies.h" #include "SIMachineFunctionInfo.h" #include "SIMachineScheduler.h" diff --git a/llvm/lib/Target/AMDGPU/CMakeLists.txt b/llvm/lib/Target/AMDGPU/CMakeLists.txt index e21b2cf62f0c8..9cb84614fefd3 100644 --- a/llvm/lib/Target/AMDGPU/CMakeLists.txt +++ b/llvm/lib/Target/AMDGPU/CMakeLists.txt @@ -137,7 +137,6 @@ add_llvm_target(AMDGPUCodeGen R600Packetizer.cpp R600RegisterInfo.cpp R600Subtarget.cpp - R600TargetMachine.cpp R600TargetTransformInfo.cpp SIAnnotateControlFlow.cpp SIFixSGPRCopies.cpp diff --git a/llvm/lib/Target/AMDGPU/R600CodeGenPassBuilder.cpp b/llvm/lib/Target/AMDGPU/R600CodeGenPassBuilder.cpp index a57b3aa0adb15..1b182e17add9c 100644 --- a/llvm/lib/Target/AMDGPU/R600CodeGenPassBuilder.cpp +++ b/llvm/lib/Target/AMDGPU/R600CodeGenPassBuilder.cpp @@ -5,12 +5,159 @@ // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // //===----------------------------------------------------------------------===// +// +/// \file +/// This file contains both AMDGPU-R600 target machine and the CodeGen pass +/// builder. The target machine contains all of the hardware specific +/// information needed to emit code for R600 GPUs and the CodeGen pass builder +/// handles the same for new pass manager infrastructure. +// +//===----------------------------------------------------------------------===// #include "R600CodeGenPassBuilder.h" -#include "R600TargetMachine.h" +#include "R600.h" +#include "R600MachineScheduler.h" +#include "R600TargetTransformInfo.h" +#include "llvm/Transforms/Scalar.h" +#include <optional> using namespace llvm; +static cl::opt<bool> + EnableR600StructurizeCFG("r600-ir-structurize", + cl::desc("Use StructurizeCFG IR pass"), + cl::init(true)); + +static cl::opt<bool> EnableR600IfConvert("r600-if-convert", + cl::desc("Use if conversion pass"), + cl::ReallyHidden, cl::init(true)); + +static cl::opt<bool, true> EnableAMDGPUFunctionCallsOpt( + "amdgpu-function-calls", cl::desc("Enable AMDGPU function call support"), + cl::location(AMDGPUTargetMachine::EnableFunctionCalls), cl::init(true), + cl::Hidden); + +static ScheduleDAGInstrs *createR600MachineScheduler(MachineSchedContext *C) { + return new ScheduleDAGMILive(C, std::make_unique<R600SchedStrategy>()); +} + +static MachineSchedRegistry R600SchedRegistry("r600", + "Run R600's custom scheduler", + createR600MachineScheduler); + +//===----------------------------------------------------------------------===// +// R600 Target Machine (R600 -> Cayman) - Legacy Pass Manager interface. +//===----------------------------------------------------------------------===// + +R600TargetMachine::R600TargetMachine(const Target &T, const Triple &TT, + StringRef CPU, StringRef FS, + const TargetOptions &Options, + std::optional<Reloc::Model> RM, + std::optional<CodeModel::Model> CM, + CodeGenOptLevel OL, bool JIT) + : AMDGPUTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL) { + setRequiresStructuredCFG(true); + + // Override the default since calls aren't supported for r600. + if (EnableFunctionCalls && + EnableAMDGPUFunctionCallsOpt.getNumOccurrences() == 0) + EnableFunctionCalls = false; +} + +const TargetSubtargetInfo * +R600TargetMachine::getSubtargetImpl(const Function &F) const { + StringRef GPU = getGPUName(F); + StringRef FS = getFeatureString(F); + + SmallString<128> SubtargetKey(GPU); + SubtargetKey.append(FS); + + auto &I = SubtargetMap[SubtargetKey]; + if (!I) { + // This needs to be done before we create a new subtarget since any + // creation will depend on the TM and the code generation flags on the + // function that reside in TargetOptions. + resetTargetOptions(F); + I = std::make_unique<R600Subtarget>(TargetTriple, GPU, FS, *this); + } + + return I.get(); +} + +TargetTransformInfo +R600TargetMachine::getTargetTransformInfo(const Function &F) const { + return TargetTransformInfo(R600TTIImpl(this, F)); +} + +namespace { +class R600PassConfig final : public AMDGPUPassConfig { +public: + R600PassConfig(LLVMTargetMachine &TM, PassManagerBase &PM) + : AMDGPUPassConfig(TM, PM) {} + + ScheduleDAGInstrs * + createMachineScheduler(MachineSchedContext *C) const override { + return createR600MachineScheduler(C); + } + + bool addPreISel() override; + bool addInstSelector() override; + void addPreRegAlloc() override; + void addPreSched2() override; + void addPreEmitPass() override; +}; +} // namespace + +//===----------------------------------------------------------------------===// +// R600 Legacy Pass Setup +//===----------------------------------------------------------------------===// + +bool R600PassConfig::addPreISel() { + AMDGPUPassConfig::addPreISel(); + + if (EnableR600StructurizeCFG) + addPass(createStructurizeCFGPass()); + return false; +} + +bool R600PassConfig::addInstSelector() { + addPass(createR600ISelDag(getAMDGPUTargetMachine(), getOptLevel())); + return false; +} + +void R600PassConfig::addPreRegAlloc() { addPass(createR600VectorRegMerger()); } + +void R600PassConfig::addPreSched2() { + addPass(createR600EmitClauseMarkers()); + if (EnableR600IfConvert) + addPass(&IfConverterID); + addPass(createR600ClauseMergePass()); +} + +void R600PassConfig::addPreEmitPass() { + addPass(createR600MachineCFGStructurizerPass()); + addPass(createR600ExpandSpecialInstrsPass()); + addPass(&FinalizeMachineBundlesID); + addPass(createR600Packetizer()); + addPass(createR600ControlFlowFinalizer()); +} + +TargetPassConfig *R600TargetMachine::createPassConfig(PassManagerBase &PM) { + return new R600PassConfig(*this, PM); +} + +Error R600TargetMachine::buildCodeGenPipeline( + ModulePassManager &MPM, raw_pwrite_stream &Out, raw_pwrite_stream *DwoOut, + CodeGenFileType FileType, const CGPassBuilderOption &Opts, + PassInstrumentationCallbacks *PIC) { + R600CodeGenPassBuilder CGPB(*this, Opts, PIC); + return CGPB.buildPipeline(MPM, Out, DwoOut, FileType); +} + +//===----------------------------------------------------------------------===// +// R600 Target Machine (R600 -> Cayman) +//===----------------------------------------------------------------------===// + R600CodeGenPassBuilder::R600CodeGenPassBuilder( R600TargetMachine &TM, const CGPassBuilderOption &Opts, PassInstrumentationCallbacks *PIC) diff --git a/llvm/lib/Target/AMDGPU/R600CodeGenPassBuilder.h b/llvm/lib/Target/AMDGPU/R600CodeGenPassBuilder.h index be7c935c094d9..a921467c04c72 100644 --- a/llvm/lib/Target/AMDGPU/R600CodeGenPassBuilder.h +++ b/llvm/lib/Target/AMDGPU/R600CodeGenPassBuilder.h @@ -9,12 +9,48 @@ #ifndef LLVM_LIB_TARGET_AMDGPU_R600CODEGENPASSBUILDER_H #define LLVM_LIB_TARGET_AMDGPU_R600CODEGENPASSBUILDER_H +#include "AMDGPUCodeGenPassBuilder.h" +#include "R600Subtarget.h" #include "llvm/MC/MCStreamer.h" #include "llvm/Passes/CodeGenPassBuilder.h" +#include "llvm/Target/TargetMachine.h" +#include <optional> namespace llvm { -class R600TargetMachine; +//===----------------------------------------------------------------------===// +// R600 Target Machine (R600 -> Cayman) - For Legacy Pass Manager. +//===----------------------------------------------------------------------===// + +class R600TargetMachine final : public AMDGPUTargetMachine { +private: + mutable StringMap<std::unique_ptr<R600Subtarget>> SubtargetMap; + +public: + R600TargetMachine(const Target &T, const Triple &TT, StringRef CPU, + StringRef FS, const TargetOptions &Options, + std::optional<Reloc::Model> RM, + std::optional<CodeModel::Model> CM, CodeGenOptLevel OL, + bool JIT); + + TargetPassConfig *createPassConfig(PassManagerBase &PM) override; + + Error buildCodeGenPipeline(ModulePassManager &MPM, raw_pwrite_stream &Out, + raw_pwrite_stream *DwoOut, + CodeGenFileType FileType, + const CGPassBuilderOption &Opt, + PassInstrumentationCallbacks *PIC) override; + + const TargetSubtargetInfo *getSubtargetImpl(const Function &) const override; + + TargetTransformInfo getTargetTransformInfo(const Function &F) const override; + + bool isMachineVerifierClean() const override { return false; } + + MachineFunctionInfo * + createMachineFunctionInfo(BumpPtrAllocator &Allocator, const Function &F, + const TargetSubtargetInfo *STI) const override; +}; class R600CodeGenPassBuilder : public CodeGenPassBuilder<R600CodeGenPassBuilder, R600TargetMachine> { diff --git a/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp b/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp index c79688bf038be..fe7ed1ac26169 100644 --- a/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp +++ b/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp @@ -14,11 +14,10 @@ #include "R600ISelLowering.h" #include "AMDGPU.h" #include "MCTargetDesc/R600MCTargetDesc.h" +#include "R600CodeGenPassBuilder.h" #include "R600Defines.h" -#include "R600InstrInfo.h" #include "R600MachineFunctionInfo.h" #include "R600Subtarget.h" -#include "R600TargetMachine.h" #include "llvm/CodeGen/MachineFunction.h" #include "llvm/IR/IntrinsicsAMDGPU.h" #include "llvm/IR/IntrinsicsR600.h" diff --git a/llvm/lib/Target/AMDGPU/R600TargetMachine.cpp b/llvm/lib/Target/AMDGPU/R600TargetMachine.cpp deleted file mode 100644 index fe1927e5bdf74..0000000000000 --- a/llvm/lib/Target/AMDGPU/R600TargetMachine.cpp +++ /dev/null @@ -1,154 +0,0 @@ -//===-- R600TargetMachine.cpp - TargetMachine for hw codegen targets-------===// -// -// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. -// See https://llvm.org/LICENSE.txt for license information. -// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception -// -//===----------------------------------------------------------------------===// -// -/// \file -/// The AMDGPU-R600 target machine contains all of the hardware specific -/// information needed to emit code for R600 GPUs. -// -//===----------------------------------------------------------------------===// - -#include "R600TargetMachine.h" -#include "R600.h" -#include "R600CodeGenPassBuilder.h" -#include "R600MachineScheduler.h" -#include "R600TargetTransformInfo.h" -#include "llvm/Transforms/Scalar.h" -#include <optional> - -using namespace llvm; - -static cl::opt<bool> - EnableR600StructurizeCFG("r600-ir-structurize", - cl::desc("Use StructurizeCFG IR pass"), - cl::init(true)); - -static cl::opt<bool> EnableR600IfConvert("r600-if-convert", - cl::desc("Use if conversion pass"), - cl::ReallyHidden, cl::init(true)); - -static cl::opt<bool, true> EnableAMDGPUFunctionCallsOpt( - "amdgpu-function-calls", cl::desc("Enable AMDGPU function call support"), - cl::location(AMDGPUTargetMachine::EnableFunctionCalls), cl::init(true), - cl::Hidden); - -static ScheduleDAGInstrs *createR600MachineScheduler(MachineSchedContext *C) { - return new ScheduleDAGMILive(C, std::make_unique<R600SchedStrategy>()); -} - -static MachineSchedRegistry R600SchedRegistry("r600", - "Run R600's custom scheduler", - createR600MachineScheduler); - -//===----------------------------------------------------------------------===// -// R600 Target Machine (R600 -> Cayman) -//===----------------------------------------------------------------------===// - -R600TargetMachine::R600TargetMachine(const Target &T, const Triple &TT, - StringRef CPU, StringRef FS, - const TargetOptions &Options, - std::optional<Reloc::Model> RM, - std::optional<CodeModel::Model> CM, - CodeGenOptLevel OL, bool JIT) - : AMDGPUTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL) { - setRequiresStructuredCFG(true); - - // Override the default since calls aren't supported for r600. - if (EnableFunctionCalls && - EnableAMDGPUFunctionCallsOpt.getNumOccurrences() == 0) - EnableFunctionCalls = false; -} - -const TargetSubtargetInfo * -R600TargetMachine::getSubtargetImpl(const Function &F) const { - StringRef GPU = getGPUName(F); - StringRef FS = getFeatureString(F); - - SmallString<128> SubtargetKey(GPU); - SubtargetKey.append(FS); - - auto &I = SubtargetMap[SubtargetKey]; - if (!I) { - // This needs to be done before we create a new subtarget since any - // creation will depend on the TM and the code generation flags on the - // function that reside in TargetOptions. - resetTargetOptions(F); - I = std::make_unique<R600Subtarget>(TargetTriple, GPU, FS, *this); - } - - return I.get(); -} - -TargetTransformInfo -R600TargetMachine::getTargetTransformInfo(const Function &F) const { - return TargetTransformInfo(R600TTIImpl(this, F)); -} - -namespace { -class R600PassConfig final : public AMDGPUPassConfig { -public: - R600PassConfig(LLVMTargetMachine &TM, PassManagerBase &PM) - : AMDGPUPassConfig(TM, PM) {} - - ScheduleDAGInstrs * - createMachineScheduler(MachineSchedContext *C) const override { - return createR600MachineScheduler(C); - } - - bool addPreISel() override; - bool addInstSelector() override; - void addPreRegAlloc() override; - void addPreSched2() override; - void addPreEmitPass() override; -}; -} // namespace - -//===----------------------------------------------------------------------===// -// R600 Pass Setup -//===----------------------------------------------------------------------===// - -bool R600PassConfig::addPreISel() { - AMDGPUPassConfig::addPreISel(); - - if (EnableR600StructurizeCFG) - addPass(createStructurizeCFGPass()); - return false; -} - -bool R600PassConfig::addInstSelector() { - addPass(createR600ISelDag(getAMDGPUTargetMachine(), getOptLevel())); - return false; -} - -void R600PassConfig::addPreRegAlloc() { addPass(createR600VectorRegMerger()); } - -void R600PassConfig::addPreSched2() { - addPass(createR600EmitClauseMarkers()); - if (EnableR600IfConvert) - addPass(&IfConverterID); - addPass(createR600ClauseMergePass()); -} - -void R600PassConfig::addPreEmitPass() { - addPass(createR600MachineCFGStructurizerPass()); - addPass(createR600ExpandSpecialInstrsPass()); - addPass(&FinalizeMachineBundlesID); - addPass(createR600Packetizer()); - addPass(createR600ControlFlowFinalizer()); -} - -TargetPassConfig *R600TargetMachine::createPassConfig(PassManagerBase &PM) { - return new R600PassConfig(*this, PM); -} - -Error R600TargetMachine::buildCodeGenPipeline( - ModulePassManager &MPM, raw_pwrite_stream &Out, raw_pwrite_stream *DwoOut, - CodeGenFileType FileType, const CGPassBuilderOption &Opts, - PassInstrumentationCallbacks *PIC) { - R600CodeGenPassBuilder CGPB(*this, Opts, PIC); - return CGPB.buildPipeline(MPM, Out, DwoOut, FileType); -} diff --git a/llvm/lib/Target/AMDGPU/R600TargetMachine.h b/llvm/lib/Target/AMDGPU/R600TargetMachine.h deleted file mode 100644 index 8359f2faa2dba..0000000000000 --- a/llvm/lib/Target/AMDGPU/R600TargetMachine.h +++ /dev/null @@ -1,60 +0,0 @@ -//===-- R600TargetMachine.h - AMDGPU TargetMachine Interface ----*- C++ -*-===// -// -// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. -// See https://llvm.org/LICENSE.txt for license information. -// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception -// -//===----------------------------------------------------------------------===// -// -/// \file -/// The AMDGPU TargetMachine interface definition for hw codegen targets. -// -//===----------------------------------------------------------------------===// - -#ifndef LLVM_LIB_TARGET_AMDGPU_R600TARGETMACHINE_H -#define LLVM_LIB_TARGET_AMDGPU_R600TARGETMACHINE_H - -#include "AMDGPUCodeGenPassBuilder.h" -#include "R600Subtarget.h" -#include "llvm/Target/TargetMachine.h" -#include <optional> - -namespace llvm { - -//===----------------------------------------------------------------------===// -// R600 Target Machine (R600 -> Cayman) -//===----------------------------------------------------------------------===// - -class R600TargetMachine final : public AMDGPUTargetMachine { -private: - mutable StringMap<std::unique_ptr<R600Subtarget>> SubtargetMap; - -public: - R600TargetMachine(const Target &T, const Triple &TT, StringRef CPU, - StringRef FS, const TargetOptions &Options, - std::optional<Reloc::Model> RM, - std::optional<CodeModel::Model> CM, CodeGenOptLevel OL, - bool JIT); - - TargetPassConfig *createPassConfig(PassManagerBase &PM) override; - - Error buildCodeGenPipeline(ModulePassManager &MPM, raw_pwrite_stream &Out, - raw_pwrite_stream *DwoOut, - CodeGenFileType FileType, - const CGPassBuilderOption &Opt, - PassInstrumentationCallbacks *PIC) override; - - const TargetSubtargetInfo *getSubtargetImpl(const Function &) const override; - - TargetTransformInfo getTargetTransformInfo(const Function &F) const override; - - bool isMachineVerifierClean() const override { return false; } - - MachineFunctionInfo * - createMachineFunctionInfo(BumpPtrAllocator &Allocator, const Function &F, - const TargetSubtargetInfo *STI) const override; -}; - -} // end namespace llvm - -#endif // LLVM_LIB_TARGET_AMDGPU_R600TARGETMACHINE_H `````````` </details> https://github.com/llvm/llvm-project/pull/103721 _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
