https://github.com/kovdan01 created
https://github.com/llvm/llvm-project/pull/113945
Assume PAC instructions being supported with PAuth core info different
from (0,0). Given that, `autia1716; br x17` can be replaced with
`braa x17, x16; nop`.
>From f2daf75b8506e31180f2d41291c6f1a63da5138b Mon Sep 17 00:00:00 2001
From: Daniil Kovalev <dkova...@accesssoftek.com>
Date: Mon, 28 Oct 2024 21:23:54 +0300
Subject: [PATCH] [PAC][lld] Use braa instr in PAC PLT sequence with valid
PAuth core info
Assume PAC instructions being supported with PAuth core info different
from (0,0). Given that, `autia1716; br x17` can be replaced with
`braa x17, x16; nop`.
---
lld/ELF/Arch/AArch64.cpp | 19 +++++++++++++++----
lld/test/ELF/aarch64-feature-pauth.s | 10 ++++++----
2 files changed, 21 insertions(+), 8 deletions(-)
diff --git a/lld/ELF/Arch/AArch64.cpp b/lld/ELF/Arch/AArch64.cpp
index 260307ac4c3dcb..c76f226bc5511c 100644
--- a/lld/ELF/Arch/AArch64.cpp
+++ b/lld/ELF/Arch/AArch64.cpp
@@ -999,7 +999,9 @@ class AArch64BtiPac final : public AArch64 {
private:
bool btiHeader; // bti instruction needed in PLT Header and Entry
- bool pacEntry; // autia1716 instruction needed in PLT Entry
+ bool pacEntry; // Authenticated branch needed in PLT Entry
+ bool pacUseHint =
+ true; // Use hint space instructions for authenticated branch in PLT
entry
};
} // namespace
@@ -1016,6 +1018,10 @@ AArch64BtiPac::AArch64BtiPac(Ctx &ctx) : AArch64(ctx) {
// from properties in the objects, so we use the command line flag.
pacEntry = ctx.arg.zPacPlt;
+ if (llvm::any_of(ctx.aarch64PauthAbiCoreInfo,
+ [](uint8_t c) { return c != 0; }))
+ pacUseHint = false;
+
if (btiHeader || pacEntry) {
pltEntrySize = 24;
ipltEntrySize = 24;
@@ -1066,9 +1072,13 @@ void AArch64BtiPac::writePlt(uint8_t *buf, const Symbol
&sym,
0x11, 0x02, 0x40, 0xf9, // ldr x17, [x16, Offset(&(.got.plt[n]))]
0x10, 0x02, 0x00, 0x91 // add x16, x16, Offset(&(.got.plt[n]))
};
+ const uint8_t pacHintBr[] = {
+ 0x9f, 0x21, 0x03, 0xd5, // autia1716
+ 0x20, 0x02, 0x1f, 0xd6 // br x17
+ };
const uint8_t pacBr[] = {
- 0x9f, 0x21, 0x03, 0xd5, // autia1716
- 0x20, 0x02, 0x1f, 0xd6 // br x17
+ 0x30, 0x0a, 0x1f, 0xd7, // braa x17, x16
+ 0x1f, 0x20, 0x03, 0xd5 // nop
};
const uint8_t stdBr[] = {
0x20, 0x02, 0x1f, 0xd6, // br x17
@@ -1097,7 +1107,8 @@ void AArch64BtiPac::writePlt(uint8_t *buf, const Symbol
&sym,
relocateNoSym(buf + 8, R_AARCH64_ADD_ABS_LO12_NC, gotPltEntryAddr);
if (pacEntry)
- memcpy(buf + sizeof(addrInst), pacBr, sizeof(pacBr));
+ memcpy(buf + sizeof(addrInst), (pacUseHint ? pacHintBr : pacBr),
+ sizeof(pacUseHint ? pacHintBr : pacBr));
else
memcpy(buf + sizeof(addrInst), stdBr, sizeof(stdBr));
if (!hasBti)
diff --git a/lld/test/ELF/aarch64-feature-pauth.s
b/lld/test/ELF/aarch64-feature-pauth.s
index c11073dba86f24..34f2f2698a26b8 100644
--- a/lld/test/ELF/aarch64-feature-pauth.s
+++ b/lld/test/ELF/aarch64-feature-pauth.s
@@ -56,8 +56,8 @@
# PACPLTTAG: 0x0000000070000003 (AARCH64_PAC_PLT)
-# RUN: llvm-objdump -d pacplt-nowarn | FileCheck --check-prefix PACPLT
-DA=10380 -DB=478 -DC=480 %s
-# RUN: llvm-objdump -d pacplt-warn | FileCheck --check-prefix PACPLT
-DA=10390 -DB=488 -DC=490 %s
+# RUN: llvm-objdump -d pacplt-nowarn | FileCheck
--check-prefixes=PACPLT,NOHINT -DA=10380 -DB=478 -DC=480 %s
+# RUN: llvm-objdump -d pacplt-warn | FileCheck --check-prefixes=PACPLT,HINT
-DA=10390 -DB=488 -DC=490 %s
# PACPLT: Disassembly of section .text:
# PACPLT: <func2>:
@@ -77,8 +77,10 @@
# PACPLT-NEXT: adrp x16, 0x30000 <func3+0x30000>
# PACPLT-NEXT: ldr x17, [x16, #0x[[C]]]
# PACPLT-NEXT: add x16, x16, #0x[[C]]
-# PACPLT-NEXT: autia1716
-# PACPLT-NEXT: br x17
+# NOHINT-NEXT: braa x17, x16
+# NOHINT-NEXT: nop
+# HINT-NEXT: autia1716
+# HINT-NEXT: br x17
# PACPLT-NEXT: nop
#--- abi-tag-short.s
_______________________________________________
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
