https://github.com/cdevadas created
https://github.com/llvm/llvm-project/pull/117544
The COPY inserted for liverange split during sgpr-regalloc
pipeline currently breaks the BB prolog during the subsequent
vgpr-regalloc phase while spilling and/or splitting the vector
liveranges. This patch fixes it by correctly including the
the LR split instructions during sgpr-regalloc and wwm-regalloc
pipelines into the BB prolog.
>From 2e2b216d58e525e7dd65245ae2ee8b86750564c8 Mon Sep 17 00:00:00 2001
From: Christudasan Devadasan <christudasan.devada...@amd.com>
Date: Tue, 19 Nov 2024 12:14:05 +0530
Subject: [PATCH] [AMDGPU] Add liverange split instructions into BB Prolog
The COPY inserted for liverange split during sgpr-regalloc
pipeline currently breaks the BB prolog during the subsequent
vgpr-regalloc phase while spilling and/or splitting the vector
liveranges. This patch fixes it by correctly including the
the LR split instructions during sgpr-regalloc and wwm-regalloc
pipelines into the BB prolog.
---
llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 34 ++++-
llvm/lib/Target/AMDGPU/SIInstrInfo.h | 2 +
.../identical-subrange-spill-infloop.ll | 116 ++++++++--------
.../ran-out-of-sgprs-allocation-failure.mir | 128 +++++++++---------
4 files changed, 148 insertions(+), 132 deletions(-)
diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
index 4a94d690297949..204a575e2f64c1 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
@@ -8956,6 +8956,30 @@ unsigned SIInstrInfo::getLiveRangeSplitOpcode(Register
SrcReg,
return AMDGPU::COPY;
}
+bool SIInstrInfo::canAddToBBProlog(const MachineInstr &MI) const {
+ uint16_t Opcode = MI.getOpcode();
+ // Check if it is SGPR spill or wwm-register spill Opcode.
+ if (isSGPRSpill(Opcode) || isWWMRegSpillOpcode(Opcode))
+ return true;
+
+ const MachineFunction *MF = MI.getMF();
+ const MachineRegisterInfo &MRI = MF->getRegInfo();
+ const SIMachineFunctionInfo *MFI = MF->getInfo<SIMachineFunctionInfo>();
+
+ // See if this is Liverange split instruction inserted for SGPR or
+ // wwm-register. The implicit def inserted for wwm-registers should also be
+ // included as they can appear at the bb begin.
+ bool IsLRSplitInst = MI.getFlag(MachineInstr::LRSplit);
+ if (!IsLRSplitInst && Opcode != AMDGPU::IMPLICIT_DEF)
+ return false;
+
+ Register Reg = MI.getOperand(0).getReg();
+ if (RI.isSGPRClass(RI.getRegClassForReg(MRI, Reg)))
+ return IsLRSplitInst;
+
+ return MFI->isWWMReg(Reg);
+}
+
bool SIInstrInfo::isBasicBlockPrologue(const MachineInstr &MI,
Register Reg) const {
// We need to handle instructions which may be inserted during register
@@ -8964,20 +8988,16 @@ bool SIInstrInfo::isBasicBlockPrologue(const
MachineInstr &MI,
// needed by the prolog. However, the insertions for scalar registers can
// always be placed at the BB top as they are independent of the exec mask
// value.
- const MachineFunction *MF = MI.getParent()->getParent();
bool IsNullOrVectorRegister = true;
if (Reg) {
+ const MachineFunction *MF = MI.getMF();
const MachineRegisterInfo &MRI = MF->getRegInfo();
IsNullOrVectorRegister = !RI.isSGPRClass(RI.getRegClassForReg(MRI, Reg));
}
- uint16_t Opcode = MI.getOpcode();
- const SIMachineFunctionInfo *MFI = MF->getInfo<SIMachineFunctionInfo>();
return IsNullOrVectorRegister &&
- (isSGPRSpill(Opcode) || isWWMRegSpillOpcode(Opcode) ||
- (Opcode == AMDGPU::IMPLICIT_DEF &&
- MFI->isWWMReg(MI.getOperand(0).getReg())) ||
- (!MI.isTerminator() && Opcode != AMDGPU::COPY &&
+ (canAddToBBProlog(MI) ||
+ (!MI.isTerminator() && MI.getOpcode() != AMDGPU::COPY &&
MI.modifiesRegister(AMDGPU::EXEC, &RI)));
}
diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.h
b/llvm/lib/Target/AMDGPU/SIInstrInfo.h
index e55418326a4bd0..ea1d16784645e1 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrInfo.h
+++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.h
@@ -1348,6 +1348,8 @@ class SIInstrInfo final : public AMDGPUGenInstrInfo {
bool isBasicBlockPrologue(const MachineInstr &MI,
Register Reg = Register()) const override;
+ bool canAddToBBProlog(const MachineInstr &MI) const;
+
MachineInstr *createPHIDestinationCopy(MachineBasicBlock &MBB,
MachineBasicBlock::iterator InsPt,
const DebugLoc &DL, Register Src,
diff --git a/llvm/test/CodeGen/AMDGPU/identical-subrange-spill-infloop.ll
b/llvm/test/CodeGen/AMDGPU/identical-subrange-spill-infloop.ll
index 5dff660912e402..d7c38f26957677 100644
--- a/llvm/test/CodeGen/AMDGPU/identical-subrange-spill-infloop.ll
+++ b/llvm/test/CodeGen/AMDGPU/identical-subrange-spill-infloop.ll
@@ -176,39 +176,39 @@ define void @main(i1 %arg) #0 {
; CHECK-NEXT: v_readlane_b32 s17, v7, 37
; CHECK-NEXT: v_readlane_b32 s18, v7, 38
; CHECK-NEXT: v_readlane_b32 s19, v7, 39
-; CHECK-NEXT: v_writelane_b32 v7, s4, 40
-; CHECK-NEXT: v_writelane_b32 v7, s5, 41
-; CHECK-NEXT: v_writelane_b32 v7, s6, 42
-; CHECK-NEXT: v_writelane_b32 v7, s7, 43
-; CHECK-NEXT: v_writelane_b32 v7, s8, 44
-; CHECK-NEXT: v_writelane_b32 v7, s9, 45
-; CHECK-NEXT: v_writelane_b32 v7, s10, 46
-; CHECK-NEXT: v_writelane_b32 v7, s11, 47
-; CHECK-NEXT: v_writelane_b32 v7, s12, 48
-; CHECK-NEXT: v_writelane_b32 v7, s13, 49
-; CHECK-NEXT: v_writelane_b32 v7, s14, 50
-; CHECK-NEXT: v_writelane_b32 v7, s15, 51
-; CHECK-NEXT: v_writelane_b32 v7, s16, 52
-; CHECK-NEXT: v_writelane_b32 v7, s17, 53
-; CHECK-NEXT: v_writelane_b32 v7, s18, 54
-; CHECK-NEXT: v_writelane_b32 v7, s19, 55
+; CHECK-NEXT: v_writelane_b32 v7, s4, 56
+; CHECK-NEXT: v_writelane_b32 v7, s5, 57
+; CHECK-NEXT: v_writelane_b32 v7, s6, 58
+; CHECK-NEXT: v_writelane_b32 v7, s7, 59
+; CHECK-NEXT: v_writelane_b32 v7, s8, 60
+; CHECK-NEXT: v_writelane_b32 v7, s9, 61
+; CHECK-NEXT: v_writelane_b32 v7, s10, 62
+; CHECK-NEXT: v_writelane_b32 v7, s11, 63
+; CHECK-NEXT: v_writelane_b32 v7, s52, 40
+; CHECK-NEXT: v_writelane_b32 v7, s53, 41
+; CHECK-NEXT: v_writelane_b32 v7, s54, 42
+; CHECK-NEXT: v_writelane_b32 v7, s55, 43
+; CHECK-NEXT: v_writelane_b32 v7, s56, 44
+; CHECK-NEXT: v_writelane_b32 v7, s57, 45
+; CHECK-NEXT: v_writelane_b32 v7, s58, 46
; CHECK-NEXT: ; implicit-def: $vgpr6 : SGPR spill to VGPR lane
-; CHECK-NEXT: v_writelane_b32 v7, s52, 56
-; CHECK-NEXT: v_writelane_b32 v6, s60, 0
-; CHECK-NEXT: v_writelane_b32 v7, s53, 57
-; CHECK-NEXT: v_writelane_b32 v6, s61, 1
-; CHECK-NEXT: v_writelane_b32 v7, s54, 58
-; CHECK-NEXT: v_writelane_b32 v6, s62, 2
-; CHECK-NEXT: v_writelane_b32 v7, s55, 59
-; CHECK-NEXT: v_writelane_b32 v6, s63, 3
-; CHECK-NEXT: v_writelane_b32 v7, s56, 60
-; CHECK-NEXT: v_writelane_b32 v6, s64, 4
-; CHECK-NEXT: v_writelane_b32 v7, s57, 61
-; CHECK-NEXT: v_writelane_b32 v6, s65, 5
-; CHECK-NEXT: v_writelane_b32 v7, s58, 62
-; CHECK-NEXT: v_writelane_b32 v6, s66, 6
-; CHECK-NEXT: v_writelane_b32 v7, s59, 63
-; CHECK-NEXT: v_writelane_b32 v6, s67, 7
+; CHECK-NEXT: v_writelane_b32 v7, s59, 47
+; CHECK-NEXT: v_writelane_b32 v6, s12, 0
+; CHECK-NEXT: v_writelane_b32 v7, s60, 48
+; CHECK-NEXT: v_writelane_b32 v6, s13, 1
+; CHECK-NEXT: v_writelane_b32 v7, s61, 49
+; CHECK-NEXT: v_writelane_b32 v6, s14, 2
+; CHECK-NEXT: v_writelane_b32 v7, s62, 50
+; CHECK-NEXT: v_writelane_b32 v6, s15, 3
+; CHECK-NEXT: v_writelane_b32 v7, s63, 51
+; CHECK-NEXT: v_writelane_b32 v6, s16, 4
+; CHECK-NEXT: v_writelane_b32 v7, s64, 52
+; CHECK-NEXT: v_writelane_b32 v6, s17, 5
+; CHECK-NEXT: v_writelane_b32 v7, s65, 53
+; CHECK-NEXT: v_writelane_b32 v6, s18, 6
+; CHECK-NEXT: v_writelane_b32 v7, s66, 54
+; CHECK-NEXT: v_writelane_b32 v6, s19, 7
+; CHECK-NEXT: v_writelane_b32 v7, s67, 55
; CHECK-NEXT: s_andn2_saveexec_b64 s[20:21], s[26:27]
; CHECK-NEXT: s_cbranch_execz .LBB0_10
; CHECK-NEXT: ; %bb.4: ; %bb32
@@ -264,35 +264,39 @@ define void @main(i1 %arg) #0 {
; CHECK-NEXT: buffer_store_dwordx4 v[0:3], off, s[8:11], 0
; CHECK-NEXT: ; implicit-def: $vgpr0
; CHECK-NEXT: .LBB0_6: ; %Flow12
-; CHECK-NEXT: s_or_saveexec_b64 s[4:5], s[22:23]
-; CHECK-NEXT: v_readlane_b32 s52, v7, 40
-; CHECK-NEXT: v_readlane_b32 s53, v7, 41
-; CHECK-NEXT: v_readlane_b32 s54, v7, 42
-; CHECK-NEXT: v_readlane_b32 s55, v7, 43
-; CHECK-NEXT: v_readlane_b32 s56, v7, 44
-; CHECK-NEXT: v_readlane_b32 s57, v7, 45
-; CHECK-NEXT: v_readlane_b32 s58, v7, 46
-; CHECK-NEXT: v_readlane_b32 s59, v7, 47
-; CHECK-NEXT: v_readlane_b32 s60, v7, 48
-; CHECK-NEXT: v_readlane_b32 s61, v7, 49
-; CHECK-NEXT: v_readlane_b32 s62, v7, 50
-; CHECK-NEXT: v_readlane_b32 s63, v7, 51
-; CHECK-NEXT: v_readlane_b32 s64, v7, 52
-; CHECK-NEXT: v_readlane_b32 s65, v7, 53
-; CHECK-NEXT: v_readlane_b32 s66, v7, 54
-; CHECK-NEXT: v_readlane_b32 s67, v7, 55
-; CHECK-NEXT: s_xor_b64 exec, exec, s[4:5]
+; CHECK-NEXT: s_andn2_saveexec_b64 s[4:5], s[22:23]
; CHECK-NEXT: s_cbranch_execz .LBB0_9
; CHECK-NEXT: ; %bb.7: ; %bb33.preheader
; CHECK-NEXT: s_mov_b32 s8, 0
; CHECK-NEXT: s_mov_b32 s6, s8
+; CHECK-NEXT: v_readlane_b32 s36, v7, 40
; CHECK-NEXT: s_mov_b32 s7, s8
; CHECK-NEXT: v_mov_b32_e32 v1, s6
-; CHECK-NEXT: v_readlane_b32 s36, v7, 56
+; CHECK-NEXT: v_readlane_b32 s37, v7, 41
; CHECK-NEXT: s_mov_b32 s9, s8
; CHECK-NEXT: s_mov_b32 s10, s8
; CHECK-NEXT: s_mov_b32 s11, s8
; CHECK-NEXT: v_mov_b32_e32 v2, s7
+; CHECK-NEXT: v_readlane_b32 s38, v7, 42
+; CHECK-NEXT: v_readlane_b32 s39, v7, 43
+; CHECK-NEXT: v_readlane_b32 s40, v7, 44
+; CHECK-NEXT: v_readlane_b32 s41, v7, 45
+; CHECK-NEXT: v_readlane_b32 s42, v7, 46
+; CHECK-NEXT: v_readlane_b32 s43, v7, 47
+; CHECK-NEXT: v_readlane_b32 s44, v7, 48
+; CHECK-NEXT: v_readlane_b32 s45, v7, 49
+; CHECK-NEXT: v_readlane_b32 s46, v7, 50
+; CHECK-NEXT: v_readlane_b32 s47, v7, 51
+; CHECK-NEXT: v_readlane_b32 s48, v7, 52
+; CHECK-NEXT: v_readlane_b32 s49, v7, 53
+; CHECK-NEXT: v_readlane_b32 s50, v7, 54
+; CHECK-NEXT: v_readlane_b32 s51, v7, 55
+; CHECK-NEXT: s_mov_b64 s[12:13], s[36:37]
+; CHECK-NEXT: s_mov_b64 s[14:15], s[38:39]
+; CHECK-NEXT: s_mov_b64 s[16:17], s[40:41]
+; CHECK-NEXT: s_mov_b64 s[18:19], s[42:43]
+; CHECK-NEXT: image_sample_lz v3, v[1:2], s[36:43], s[8:11] dmask:0x1
+; CHECK-NEXT: v_readlane_b32 s36, v7, 56
; CHECK-NEXT: v_readlane_b32 s37, v7, 57
; CHECK-NEXT: v_readlane_b32 s38, v7, 58
; CHECK-NEXT: v_readlane_b32 s39, v7, 59
@@ -300,26 +304,20 @@ define void @main(i1 %arg) #0 {
; CHECK-NEXT: v_readlane_b32 s41, v7, 61
; CHECK-NEXT: v_readlane_b32 s42, v7, 62
; CHECK-NEXT: v_readlane_b32 s43, v7, 63
-; CHECK-NEXT: s_nop 4
-; CHECK-NEXT: image_sample_lz v3, v[1:2], s[36:43], s[8:11] dmask:0x1
-; CHECK-NEXT: image_sample_lz v4, v[1:2], s[52:59], s[8:11] dmask:0x1
; CHECK-NEXT: ; kill: killed $vgpr1_vgpr2
-; CHECK-NEXT: s_mov_b64 s[12:13], s[36:37]
; CHECK-NEXT: s_and_b64 vcc, exec, 0
; CHECK-NEXT: v_readlane_b32 s44, v6, 0
; CHECK-NEXT: v_readlane_b32 s45, v6, 1
; CHECK-NEXT: v_readlane_b32 s46, v6, 2
; CHECK-NEXT: v_readlane_b32 s47, v6, 3
+; CHECK-NEXT: image_sample_lz v4, v[1:2], s[36:43], s[8:11] dmask:0x1
; CHECK-NEXT: v_readlane_b32 s48, v6, 4
; CHECK-NEXT: v_readlane_b32 s49, v6, 5
; CHECK-NEXT: v_readlane_b32 s50, v6, 6
; CHECK-NEXT: v_readlane_b32 s51, v6, 7
-; CHECK-NEXT: s_mov_b64 s[14:15], s[38:39]
-; CHECK-NEXT: s_mov_b64 s[16:17], s[40:41]
-; CHECK-NEXT: s_mov_b64 s[18:19], s[42:43]
; CHECK-NEXT: ; kill: killed
$sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19
; CHECK-NEXT: ; kill: killed $sgpr8_sgpr9_sgpr10 killed $sgpr11
-; CHECK-NEXT: ; kill: killed
$sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59
+; CHECK-NEXT: ; kill: killed
$sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43
; CHECK-NEXT: s_waitcnt vmcnt(0)
; CHECK-NEXT: v_sub_f32_e32 v1, v4, v3
; CHECK-NEXT: v_mul_f32_e32 v0, v1, v0
diff --git a/llvm/test/CodeGen/AMDGPU/ran-out-of-sgprs-allocation-failure.mir
b/llvm/test/CodeGen/AMDGPU/ran-out-of-sgprs-allocation-failure.mir
index c6ee557d970cd7..b376648b29d7d8 100644
--- a/llvm/test/CodeGen/AMDGPU/ran-out-of-sgprs-allocation-failure.mir
+++ b/llvm/test/CodeGen/AMDGPU/ran-out-of-sgprs-allocation-failure.mir
@@ -41,20 +41,22 @@ body: |
; CHECK-NEXT: successors: %bb.1(0x80000000)
; CHECK-NEXT: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $sgpr4_sgpr5,
$sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11
; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: renamable $sgpr60 = COPY $sgpr15
+ ; CHECK-NEXT: renamable $sgpr62 = COPY $sgpr14
; CHECK-NEXT: renamable $sgpr34_sgpr35 = V_CMP_GT_I32_e64 1, undef
%18:vgpr_32, implicit $exec
; CHECK-NEXT: renamable $sgpr36_sgpr37 = V_CMP_EQ_U32_e64 0, undef
%18:vgpr_32, implicit $exec
; CHECK-NEXT: renamable $sgpr38_sgpr39 = V_CMP_NE_U32_e64 0, undef
%18:vgpr_32, implicit $exec
; CHECK-NEXT: renamable $sgpr40_sgpr41 = V_CMP_GT_I32_e64 0, undef
%18:vgpr_32, implicit $exec
- ; CHECK-NEXT: renamable $sgpr60 = S_MOV_B32 0
+ ; CHECK-NEXT: renamable $sgpr64 = S_MOV_B32 0
; CHECK-NEXT: renamable $sgpr42_sgpr43 = V_CMP_EQ_U32_e64 undef $sgpr4,
undef %18:vgpr_32, implicit $exec
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:vreg_1024_align2 = COPY renamable
$sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67_sgpr68_sgpr69_sgpr70_sgpr71_sgpr72_sgpr73_sgpr74_sgpr75,
implicit $exec
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:vreg_1024_align2 = COPY renamable
$sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67_sgpr68_sgpr69_sgpr70_sgpr71_sgpr72_sgpr73_sgpr74_sgpr75_sgpr76_sgpr77_sgpr78_sgpr79,
implicit $exec
; CHECK-NEXT: renamable $sgpr44_sgpr45 = V_CMP_NE_U32_e64 1, undef
%18:vgpr_32, implicit $exec
- ; CHECK-NEXT: renamable $sgpr61 = S_MOV_B32 1083786240
+ ; CHECK-NEXT: renamable $sgpr65 = S_MOV_B32 1083786240
; CHECK-NEXT: S_BRANCH %bb.1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1:
; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.17(0x40000000)
- ; CHECK-NEXT: liveins: $sgpr14, $sgpr15, $sgpr16, $sgpr4_sgpr5,
$sgpr6_sgpr7, $sgpr8_sgpr9:0x0000000000000003, $sgpr10_sgpr11, $sgpr34_sgpr35,
$sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr44_sgpr45,
$sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67_sgpr68_sgpr69_sgpr70_sgpr71_sgpr72_sgpr73_sgpr74_sgpr75:0x0000000F00000000
+ ; CHECK-NEXT: liveins: $sgpr16, $sgpr60, $sgpr62, $sgpr4_sgpr5,
$sgpr6_sgpr7, $sgpr8_sgpr9:0x0000000000000003, $sgpr10_sgpr11, $sgpr34_sgpr35,
$sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr44_sgpr45,
$sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67_sgpr68_sgpr69_sgpr70_sgpr71_sgpr72_sgpr73_sgpr74_sgpr75_sgpr76_sgpr77_sgpr78_sgpr79:0x0000000F00000000
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: $vcc = S_AND_B64 $exec, renamable $sgpr44_sgpr45,
implicit-def dead $scc
; CHECK-NEXT: [[COPY1:%[0-9]+]]:vreg_1024_align2 = COPY [[COPY]]
@@ -63,50 +65,48 @@ body: |
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.2:
; CHECK-NEXT: successors: %bb.11(0x40000000), %bb.5(0x40000000)
- ; CHECK-NEXT: liveins: $sgpr14, $sgpr15, $sgpr16, $sgpr4_sgpr5,
$sgpr6_sgpr7, $sgpr8_sgpr9:0x0000000000000003, $sgpr10_sgpr11, $sgpr34_sgpr35,
$sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr44_sgpr45,
$sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67_sgpr68_sgpr69_sgpr70_sgpr71_sgpr72_sgpr73_sgpr74_sgpr75:0x0000000F00000000
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: renamable $sgpr64 = COPY renamable $sgpr60
- ; CHECK-NEXT: renamable $sgpr65 = COPY renamable $sgpr60
- ; CHECK-NEXT: renamable $sgpr66 = COPY renamable $sgpr60
- ; CHECK-NEXT: renamable $sgpr67 = COPY renamable $sgpr60
- ; CHECK-NEXT: renamable $sgpr68 = COPY renamable $sgpr60
- ; CHECK-NEXT: renamable $sgpr69 = COPY renamable $sgpr60
- ; CHECK-NEXT: renamable $sgpr70 = COPY renamable $sgpr60
- ; CHECK-NEXT: renamable $sgpr71 = COPY renamable $sgpr60
- ; CHECK-NEXT: renamable $sgpr72 = COPY renamable $sgpr60
- ; CHECK-NEXT: renamable $sgpr73 = COPY renamable $sgpr60
- ; CHECK-NEXT: renamable $sgpr74 = COPY renamable $sgpr60
- ; CHECK-NEXT: renamable $sgpr75 = COPY renamable $sgpr60
- ; CHECK-NEXT: renamable $sgpr76 = COPY renamable $sgpr60
- ; CHECK-NEXT: renamable $sgpr77 = COPY renamable $sgpr60
- ; CHECK-NEXT: renamable $sgpr78 = COPY renamable $sgpr60
- ; CHECK-NEXT: renamable $sgpr79 = COPY renamable $sgpr60
- ; CHECK-NEXT: renamable $sgpr80 = COPY renamable $sgpr60
- ; CHECK-NEXT: renamable $sgpr81 = COPY renamable $sgpr60
- ; CHECK-NEXT: renamable $sgpr82 = COPY renamable $sgpr60
- ; CHECK-NEXT: renamable $sgpr83 = COPY renamable $sgpr60
- ; CHECK-NEXT: renamable $sgpr84 = COPY renamable $sgpr60
- ; CHECK-NEXT: renamable $sgpr85 = COPY renamable $sgpr60
- ; CHECK-NEXT: renamable $sgpr86 = COPY renamable $sgpr60
- ; CHECK-NEXT: renamable $sgpr87 = COPY renamable $sgpr60
- ; CHECK-NEXT: renamable $sgpr88 = COPY renamable $sgpr60
- ; CHECK-NEXT: renamable $sgpr89 = COPY renamable $sgpr60
- ; CHECK-NEXT: renamable $sgpr90 = COPY renamable $sgpr60
- ; CHECK-NEXT: renamable $sgpr91 = COPY renamable $sgpr60
- ; CHECK-NEXT: renamable $sgpr92 = COPY renamable $sgpr60
- ; CHECK-NEXT: renamable $sgpr93 = COPY renamable $sgpr60
- ; CHECK-NEXT: renamable $sgpr94 = COPY renamable $sgpr60
- ; CHECK-NEXT: renamable $sgpr95 = COPY renamable $sgpr60
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:vreg_1024_align2 = COPY killed renamable
$sgpr64_sgpr65_sgpr66_sgpr67_sgpr68_sgpr69_sgpr70_sgpr71_sgpr72_sgpr73_sgpr74_sgpr75_sgpr76_sgpr77_sgpr78_sgpr79_sgpr80_sgpr81_sgpr82_sgpr83_sgpr84_sgpr85_sgpr86_sgpr87_sgpr88_sgpr89_sgpr90_sgpr91_sgpr92_sgpr93_sgpr94_sgpr95,
implicit $exec
+ ; CHECK-NEXT: liveins: $sgpr16, $sgpr60, $sgpr62, $sgpr4_sgpr5,
$sgpr6_sgpr7, $sgpr8_sgpr9:0x0000000000000003, $sgpr10_sgpr11, $sgpr34_sgpr35,
$sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr44_sgpr45,
$sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67_sgpr68_sgpr69_sgpr70_sgpr71_sgpr72_sgpr73_sgpr74_sgpr75_sgpr76_sgpr77_sgpr78_sgpr79:0x0000000F00000000
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: renamable $sgpr68 = COPY renamable $sgpr64
+ ; CHECK-NEXT: renamable $sgpr69 = COPY renamable $sgpr64
+ ; CHECK-NEXT: renamable $sgpr70 = COPY renamable $sgpr64
+ ; CHECK-NEXT: renamable $sgpr71 = COPY renamable $sgpr64
+ ; CHECK-NEXT: renamable $sgpr72 = COPY renamable $sgpr64
+ ; CHECK-NEXT: renamable $sgpr73 = COPY renamable $sgpr64
+ ; CHECK-NEXT: renamable $sgpr74 = COPY renamable $sgpr64
+ ; CHECK-NEXT: renamable $sgpr75 = COPY renamable $sgpr64
+ ; CHECK-NEXT: renamable $sgpr76 = COPY renamable $sgpr64
+ ; CHECK-NEXT: renamable $sgpr77 = COPY renamable $sgpr64
+ ; CHECK-NEXT: renamable $sgpr78 = COPY renamable $sgpr64
+ ; CHECK-NEXT: renamable $sgpr79 = COPY renamable $sgpr64
+ ; CHECK-NEXT: renamable $sgpr80 = COPY renamable $sgpr64
+ ; CHECK-NEXT: renamable $sgpr81 = COPY renamable $sgpr64
+ ; CHECK-NEXT: renamable $sgpr82 = COPY renamable $sgpr64
+ ; CHECK-NEXT: renamable $sgpr83 = COPY renamable $sgpr64
+ ; CHECK-NEXT: renamable $sgpr84 = COPY renamable $sgpr64
+ ; CHECK-NEXT: renamable $sgpr85 = COPY renamable $sgpr64
+ ; CHECK-NEXT: renamable $sgpr86 = COPY renamable $sgpr64
+ ; CHECK-NEXT: renamable $sgpr87 = COPY renamable $sgpr64
+ ; CHECK-NEXT: renamable $sgpr88 = COPY renamable $sgpr64
+ ; CHECK-NEXT: renamable $sgpr89 = COPY renamable $sgpr64
+ ; CHECK-NEXT: renamable $sgpr90 = COPY renamable $sgpr64
+ ; CHECK-NEXT: renamable $sgpr91 = COPY renamable $sgpr64
+ ; CHECK-NEXT: renamable $sgpr92 = COPY renamable $sgpr64
+ ; CHECK-NEXT: renamable $sgpr93 = COPY renamable $sgpr64
+ ; CHECK-NEXT: renamable $sgpr94 = COPY renamable $sgpr64
+ ; CHECK-NEXT: renamable $sgpr95 = COPY renamable $sgpr64
+ ; CHECK-NEXT: renamable $sgpr96 = COPY renamable $sgpr64
+ ; CHECK-NEXT: renamable $sgpr97 = COPY renamable $sgpr64
+ ; CHECK-NEXT: renamable $sgpr98 = COPY renamable $sgpr64
+ ; CHECK-NEXT: renamable $sgpr99 = COPY renamable $sgpr64
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:vreg_1024_align2 = COPY killed renamable
$sgpr68_sgpr69_sgpr70_sgpr71_sgpr72_sgpr73_sgpr74_sgpr75_sgpr76_sgpr77_sgpr78_sgpr79_sgpr80_sgpr81_sgpr82_sgpr83_sgpr84_sgpr85_sgpr86_sgpr87_sgpr88_sgpr89_sgpr90_sgpr91_sgpr92_sgpr93_sgpr94_sgpr95_sgpr96_sgpr97_sgpr98_sgpr99,
implicit $exec
; CHECK-NEXT: S_CBRANCH_EXECZ %bb.11, implicit $exec
; CHECK-NEXT: S_BRANCH %bb.5
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.3:
; CHECK-NEXT: successors: %bb.4(0x80000000)
- ; CHECK-NEXT: liveins: $sgpr14, $sgpr15, $sgpr16
+ ; CHECK-NEXT: liveins: $sgpr16, $sgpr60, $sgpr62
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: renamable $sgpr60 = COPY killed renamable $sgpr14
- ; CHECK-NEXT: renamable $sgpr62 = COPY killed renamable $sgpr15
; CHECK-NEXT: SI_SPILL_S32_SAVE killed renamable $sgpr16, %stack.0,
implicit $exec, implicit $sgpr32 :: (store (s32) into %stack.0, addrspace 5)
; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def dead $scc, implicit-def
$sgpr32, implicit $sgpr32
; CHECK-NEXT: dead $sgpr30_sgpr31 = SI_CALL undef renamable $sgpr4_sgpr5,
0, CustomRegMask($sgpr60,$sgpr62)
@@ -117,8 +117,8 @@ body: |
; CHECK-NEXT: liveins: $sgpr60, $sgpr62
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def dead $scc, implicit-def
$sgpr32, implicit $sgpr32
- ; CHECK-NEXT: $sgpr12 = COPY killed renamable $sgpr60
- ; CHECK-NEXT: $sgpr13 = COPY killed renamable $sgpr62
+ ; CHECK-NEXT: $sgpr12 = COPY killed renamable $sgpr62
+ ; CHECK-NEXT: $sgpr13 = COPY killed renamable $sgpr60
; CHECK-NEXT: $sgpr14 = SI_SPILL_S32_RESTORE %stack.0, implicit $exec,
implicit $sgpr32 :: (load (s32) from %stack.0, addrspace 5)
; CHECK-NEXT: dead $sgpr30_sgpr31 = SI_CALL undef renamable $sgpr4_sgpr5,
0, csr_amdgpu_noregs, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14
; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def dead $scc, implicit-def
$sgpr32, implicit $sgpr32
@@ -126,7 +126,7 @@ body: |
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.5:
; CHECK-NEXT: successors: %bb.12(0x40000000), %bb.6(0x40000000)
- ; CHECK-NEXT: liveins: $sgpr14, $sgpr15, $sgpr16, $sgpr4_sgpr5,
$sgpr6_sgpr7, $sgpr8_sgpr9:0x0000000000000003, $sgpr10_sgpr11, $sgpr34_sgpr35,
$sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr44_sgpr45,
$sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67_sgpr68_sgpr69_sgpr70_sgpr71_sgpr72_sgpr73_sgpr74_sgpr75:0x0000000F00000000
+ ; CHECK-NEXT: liveins: $sgpr16, $sgpr60, $sgpr62, $sgpr4_sgpr5,
$sgpr6_sgpr7, $sgpr8_sgpr9:0x0000000000000003, $sgpr10_sgpr11, $sgpr34_sgpr35,
$sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr44_sgpr45,
$sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67_sgpr68_sgpr69_sgpr70_sgpr71_sgpr72_sgpr73_sgpr74_sgpr75_sgpr76_sgpr77_sgpr78_sgpr79:0x0000000F00000000
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: renamable $sgpr12_sgpr13 = S_AND_B64 renamable
$sgpr38_sgpr39, undef renamable $sgpr46_sgpr47, implicit-def dead $scc
; CHECK-NEXT: renamable $sgpr46_sgpr47 = V_CMP_GT_I32_e64 0, undef
%18:vgpr_32, implicit $exec
@@ -135,30 +135,30 @@ body: |
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.6:
; CHECK-NEXT: successors: %bb.7(0x80000000)
- ; CHECK-NEXT: liveins: $sgpr14, $sgpr15, $sgpr16, $sgpr4_sgpr5,
$sgpr6_sgpr7, $sgpr8_sgpr9:0x0000000000000003, $sgpr10_sgpr11, $sgpr34_sgpr35,
$sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr44_sgpr45,
$sgpr46_sgpr47,
$sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67_sgpr68_sgpr69_sgpr70_sgpr71_sgpr72_sgpr73_sgpr74_sgpr75:0x0000000F00000000
+ ; CHECK-NEXT: liveins: $sgpr16, $sgpr60, $sgpr62, $sgpr4_sgpr5,
$sgpr6_sgpr7, $sgpr8_sgpr9:0x0000000000000003, $sgpr10_sgpr11, $sgpr34_sgpr35,
$sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr44_sgpr45,
$sgpr46_sgpr47,
$sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67_sgpr68_sgpr69_sgpr70_sgpr71_sgpr72_sgpr73_sgpr74_sgpr75_sgpr76_sgpr77_sgpr78_sgpr79:0x0000000F00000000
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: dead [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 =
V_CNDMASK_B32_e64 0, 0, 0, 1, $sgpr40_sgpr41, implicit $exec
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.7:
; CHECK-NEXT: successors: %bb.8(0x80000000)
- ; CHECK-NEXT: liveins: $sgpr14, $sgpr15, $sgpr16, $sgpr4_sgpr5,
$sgpr6_sgpr7, $sgpr8_sgpr9:0x0000000000000003, $sgpr10_sgpr11, $sgpr34_sgpr35,
$sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr44_sgpr45,
$sgpr46_sgpr47,
$sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67_sgpr68_sgpr69_sgpr70_sgpr71_sgpr72_sgpr73_sgpr74_sgpr75:0x0000000F00000000
+ ; CHECK-NEXT: liveins: $sgpr16, $sgpr60, $sgpr62, $sgpr4_sgpr5,
$sgpr6_sgpr7, $sgpr8_sgpr9:0x0000000000000003, $sgpr10_sgpr11, $sgpr34_sgpr35,
$sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr44_sgpr45,
$sgpr46_sgpr47,
$sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67_sgpr68_sgpr69_sgpr70_sgpr71_sgpr72_sgpr73_sgpr74_sgpr75_sgpr76_sgpr77_sgpr78_sgpr79:0x0000000F00000000
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: renamable $sgpr48_sgpr49 = nofpexcept V_CMP_NLT_F64_e64 0,
undef $sgpr4_sgpr5, 0, undef %29:vreg_64_align2, 0, implicit $mode, implicit
$exec
; CHECK-NEXT: renamable $sgpr50_sgpr51 = nofpexcept V_CMP_NLT_F64_e64 0,
4607182418800017408, 0, undef %29:vreg_64_align2, 0, implicit $mode, implicit
$exec
- ; CHECK-NEXT: dead
[[V_INDIRECT_REG_READ_GPR_IDX_B32_V32_:%[0-9]+]]:vgpr_32 =
V_INDIRECT_REG_READ_GPR_IDX_B32_V32 [[COPY1]], undef $sgpr14, 11, implicit-def
$m0, implicit $m0, implicit $exec
+ ; CHECK-NEXT: dead
[[V_INDIRECT_REG_READ_GPR_IDX_B32_V32_:%[0-9]+]]:vgpr_32 =
V_INDIRECT_REG_READ_GPR_IDX_B32_V32 [[COPY1]], undef $sgpr62, 11, implicit-def
$m0, implicit $m0, implicit $exec
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.8:
; CHECK-NEXT: successors: %bb.10(0x40000000), %bb.9(0x40000000)
- ; CHECK-NEXT: liveins: $sgpr14, $sgpr15, $sgpr16, $sgpr4_sgpr5,
$sgpr6_sgpr7, $sgpr8_sgpr9:0x0000000000000003, $sgpr10_sgpr11, $sgpr34_sgpr35,
$sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr44_sgpr45,
$sgpr46_sgpr47, $sgpr48_sgpr49, $sgpr50_sgpr51,
$sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67_sgpr68_sgpr69_sgpr70_sgpr71_sgpr72_sgpr73_sgpr74_sgpr75:0x0000000F00000000
+ ; CHECK-NEXT: liveins: $sgpr16, $sgpr60, $sgpr62, $sgpr4_sgpr5,
$sgpr6_sgpr7, $sgpr8_sgpr9:0x0000000000000003, $sgpr10_sgpr11, $sgpr34_sgpr35,
$sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr44_sgpr45,
$sgpr46_sgpr47, $sgpr48_sgpr49, $sgpr50_sgpr51,
$sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67_sgpr68_sgpr69_sgpr70_sgpr71_sgpr72_sgpr73_sgpr74_sgpr75_sgpr76_sgpr77_sgpr78_sgpr79:0x0000000F00000000
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: $vcc = S_AND_B64 $exec, renamable $sgpr48_sgpr49,
implicit-def dead $scc
; CHECK-NEXT: S_CBRANCH_VCCNZ %bb.10, implicit $vcc
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.9:
; CHECK-NEXT: successors: %bb.10(0x40000000), %bb.17(0x40000000)
- ; CHECK-NEXT: liveins: $sgpr14, $sgpr15, $sgpr16, $sgpr4_sgpr5,
$sgpr6_sgpr7, $sgpr8_sgpr9:0x0000000000000003, $sgpr10_sgpr11, $sgpr34_sgpr35,
$sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr44_sgpr45,
$sgpr46_sgpr47, $sgpr48_sgpr49, $sgpr50_sgpr51,
$sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67_sgpr68_sgpr69_sgpr70_sgpr71_sgpr72_sgpr73_sgpr74_sgpr75:0x0000000F00000000
+ ; CHECK-NEXT: liveins: $sgpr16, $sgpr60, $sgpr62, $sgpr4_sgpr5,
$sgpr6_sgpr7, $sgpr8_sgpr9:0x0000000000000003, $sgpr10_sgpr11, $sgpr34_sgpr35,
$sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr44_sgpr45,
$sgpr46_sgpr47, $sgpr48_sgpr49, $sgpr50_sgpr51,
$sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67_sgpr68_sgpr69_sgpr70_sgpr71_sgpr72_sgpr73_sgpr74_sgpr75_sgpr76_sgpr77_sgpr78_sgpr79:0x0000000F00000000
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vreg_64_align2 = COPY renamable
$sgpr60_sgpr61, implicit $exec
+ ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vreg_64_align2 = COPY renamable
$sgpr64_sgpr65, implicit $exec
; CHECK-NEXT: GLOBAL_STORE_DWORDX2_SADDR undef %18:vgpr_32, [[COPY2]],
undef renamable $sgpr4_sgpr5, 0, 0, implicit $exec :: (store (s64), addrspace 1)
; CHECK-NEXT: [[V_CNDMASK_B32_e64_1:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64
0, 0, 0, 1, $sgpr34_sgpr35, implicit $exec
; CHECK-NEXT: dead renamable $sgpr12_sgpr13 = V_CMP_NE_U32_e64 1,
[[V_CNDMASK_B32_e64_1]], implicit $exec
@@ -170,23 +170,19 @@ body: |
; CHECK-NEXT: $sgpr6_sgpr7 = COPY renamable $sgpr54_sgpr55
; CHECK-NEXT: renamable $sgpr56_sgpr57 = COPY killed renamable
$sgpr10_sgpr11
; CHECK-NEXT: $sgpr10_sgpr11 = COPY renamable $sgpr56_sgpr57
- ; CHECK-NEXT: $sgpr12 = COPY renamable $sgpr14
- ; CHECK-NEXT: $sgpr13 = COPY renamable $sgpr15
- ; CHECK-NEXT: renamable $sgpr62 = COPY killed renamable $sgpr8
+ ; CHECK-NEXT: $sgpr12 = COPY renamable $sgpr62
+ ; CHECK-NEXT: $sgpr13 = COPY renamable $sgpr60
+ ; CHECK-NEXT: renamable $sgpr66 = COPY killed renamable $sgpr8
; CHECK-NEXT: renamable $sgpr33 = COPY killed renamable $sgpr16
- ; CHECK-NEXT: renamable $sgpr59 = COPY killed renamable $sgpr15
- ; CHECK-NEXT: renamable $sgpr63 = COPY killed renamable $sgpr14
; CHECK-NEXT: dead $sgpr30_sgpr31 = SI_CALL undef renamable
$sgpr12_sgpr13, 0, csr_amdgpu_gfx90ainsts, implicit $sgpr4_sgpr5, implicit
$sgpr6_sgpr7, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13
; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def dead $scc, implicit-def
$sgpr32, implicit $sgpr32
; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def dead $scc, implicit-def
$sgpr32, implicit $sgpr32
; CHECK-NEXT: $sgpr8_sgpr9 = COPY renamable $sgpr58_sgpr59
; CHECK-NEXT: dead $sgpr30_sgpr31 = SI_CALL undef renamable
$sgpr12_sgpr13, 0, csr_amdgpu_gfx90ainsts, implicit $sgpr8_sgpr9
- ; CHECK-NEXT: renamable $sgpr14 = COPY killed renamable $sgpr63
- ; CHECK-NEXT: renamable $sgpr15 = COPY killed renamable $sgpr59
; CHECK-NEXT: renamable $sgpr16 = COPY killed renamable $sgpr33
; CHECK-NEXT: renamable $sgpr4_sgpr5 = COPY killed renamable $sgpr52_sgpr53
; CHECK-NEXT: renamable $sgpr6_sgpr7 = COPY killed renamable $sgpr54_sgpr55
- ; CHECK-NEXT: renamable $sgpr8 = COPY killed renamable $sgpr62
+ ; CHECK-NEXT: renamable $sgpr8 = COPY killed renamable $sgpr66
; CHECK-NEXT: renamable $sgpr10_sgpr11 = COPY killed renamable
$sgpr56_sgpr57
; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def dead $scc, implicit-def
$sgpr32, implicit $sgpr32
; CHECK-NEXT: $exec = S_MOV_B64_term renamable $sgpr50_sgpr51
@@ -195,28 +191,28 @@ body: |
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.10:
; CHECK-NEXT: successors: %bb.8(0x40000000), %bb.12(0x40000000)
- ; CHECK-NEXT: liveins: $sgpr14, $sgpr15, $sgpr16, $sgpr4_sgpr5,
$sgpr6_sgpr7, $sgpr8_sgpr9:0x0000000000000003, $sgpr10_sgpr11, $sgpr34_sgpr35,
$sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr44_sgpr45,
$sgpr46_sgpr47, $sgpr48_sgpr49, $sgpr50_sgpr51,
$sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67_sgpr68_sgpr69_sgpr70_sgpr71_sgpr72_sgpr73_sgpr74_sgpr75:0x0000000F00000000
+ ; CHECK-NEXT: liveins: $sgpr16, $sgpr60, $sgpr62, $sgpr4_sgpr5,
$sgpr6_sgpr7, $sgpr8_sgpr9:0x0000000000000003, $sgpr10_sgpr11, $sgpr34_sgpr35,
$sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr44_sgpr45,
$sgpr46_sgpr47, $sgpr48_sgpr49, $sgpr50_sgpr51,
$sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67_sgpr68_sgpr69_sgpr70_sgpr71_sgpr72_sgpr73_sgpr74_sgpr75_sgpr76_sgpr77_sgpr78_sgpr79:0x0000000F00000000
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: S_CBRANCH_EXECZ %bb.8, implicit $exec
; CHECK-NEXT: S_BRANCH %bb.12
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.11:
; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.17(0x40000000)
- ; CHECK-NEXT: liveins: $sgpr14, $sgpr15, $sgpr16, $sgpr4_sgpr5,
$sgpr6_sgpr7, $sgpr8_sgpr9:0x0000000000000003, $sgpr10_sgpr11, $sgpr34_sgpr35,
$sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr44_sgpr45,
$sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67_sgpr68_sgpr69_sgpr70_sgpr71_sgpr72_sgpr73_sgpr74_sgpr75:0x0000000F00000000
+ ; CHECK-NEXT: liveins: $sgpr16, $sgpr60, $sgpr62, $sgpr4_sgpr5,
$sgpr6_sgpr7, $sgpr8_sgpr9:0x0000000000000003, $sgpr10_sgpr11, $sgpr34_sgpr35,
$sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr44_sgpr45,
$sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67_sgpr68_sgpr69_sgpr70_sgpr71_sgpr72_sgpr73_sgpr74_sgpr75_sgpr76_sgpr77_sgpr78_sgpr79:0x0000000F00000000
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: S_CBRANCH_EXECZ %bb.1, implicit $exec
; CHECK-NEXT: S_BRANCH %bb.17
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.12:
; CHECK-NEXT: successors: %bb.11(0x40000000), %bb.13(0x40000000)
- ; CHECK-NEXT: liveins: $sgpr14, $sgpr15, $sgpr16, $sgpr4_sgpr5,
$sgpr6_sgpr7, $sgpr8_sgpr9:0x0000000000000003, $sgpr10_sgpr11, $sgpr34_sgpr35,
$sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr44_sgpr45,
$sgpr46_sgpr47,
$sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67_sgpr68_sgpr69_sgpr70_sgpr71_sgpr72_sgpr73_sgpr74_sgpr75:0x0000000F00000000
+ ; CHECK-NEXT: liveins: $sgpr16, $sgpr60, $sgpr62, $sgpr4_sgpr5,
$sgpr6_sgpr7, $sgpr8_sgpr9:0x0000000000000003, $sgpr10_sgpr11, $sgpr34_sgpr35,
$sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr44_sgpr45,
$sgpr46_sgpr47,
$sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67_sgpr68_sgpr69_sgpr70_sgpr71_sgpr72_sgpr73_sgpr74_sgpr75_sgpr76_sgpr77_sgpr78_sgpr79:0x0000000F00000000
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: $exec = S_MOV_B64_term killed renamable $sgpr46_sgpr47
; CHECK-NEXT: S_CBRANCH_EXECZ %bb.11, implicit $exec
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.13:
; CHECK-NEXT: successors: %bb.15(0x40000000), %bb.14(0x40000000)
- ; CHECK-NEXT: liveins: $sgpr14, $sgpr15, $sgpr16, $sgpr4_sgpr5,
$sgpr6_sgpr7, $sgpr8_sgpr9:0x0000000000000003, $sgpr10_sgpr11, $sgpr34_sgpr35,
$sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr44_sgpr45,
$sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67_sgpr68_sgpr69_sgpr70_sgpr71_sgpr72_sgpr73_sgpr74_sgpr75:0x0000000F00000000
+ ; CHECK-NEXT: liveins: $sgpr16, $sgpr60, $sgpr62, $sgpr4_sgpr5,
$sgpr6_sgpr7, $sgpr8_sgpr9:0x0000000000000003, $sgpr10_sgpr11, $sgpr34_sgpr35,
$sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr44_sgpr45,
$sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67_sgpr68_sgpr69_sgpr70_sgpr71_sgpr72_sgpr73_sgpr74_sgpr75_sgpr76_sgpr77_sgpr78_sgpr79:0x0000000F00000000
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: $vcc = S_AND_B64 $exec, renamable $sgpr42_sgpr43,
implicit-def dead $scc
; CHECK-NEXT: S_CBRANCH_VCCNZ %bb.15, implicit $vcc
@@ -224,18 +220,18 @@ body: |
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.14:
; CHECK-NEXT: successors: %bb.15(0x80000000)
- ; CHECK-NEXT: liveins: $sgpr14, $sgpr15, $sgpr16, $sgpr4_sgpr5,
$sgpr6_sgpr7, $sgpr8_sgpr9:0x0000000000000003, $sgpr10_sgpr11, $sgpr34_sgpr35,
$sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr44_sgpr45,
$sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67_sgpr68_sgpr69_sgpr70_sgpr71_sgpr72_sgpr73_sgpr74_sgpr75:0x0000000F00000000
+ ; CHECK-NEXT: liveins: $sgpr16, $sgpr60, $sgpr62, $sgpr4_sgpr5,
$sgpr6_sgpr7, $sgpr8_sgpr9:0x0000000000000003, $sgpr10_sgpr11, $sgpr34_sgpr35,
$sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr44_sgpr45,
$sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67_sgpr68_sgpr69_sgpr70_sgpr71_sgpr72_sgpr73_sgpr74_sgpr75_sgpr76_sgpr77_sgpr78_sgpr79:0x0000000F00000000
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.15:
; CHECK-NEXT: successors: %bb.11(0x40000000), %bb.16(0x40000000)
- ; CHECK-NEXT: liveins: $sgpr14, $sgpr15, $sgpr16, $sgpr4_sgpr5,
$sgpr6_sgpr7, $sgpr8_sgpr9:0x0000000000000003, $sgpr10_sgpr11, $sgpr34_sgpr35,
$sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr44_sgpr45,
$sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67_sgpr68_sgpr69_sgpr70_sgpr71_sgpr72_sgpr73_sgpr74_sgpr75:0x0000000F00000000
+ ; CHECK-NEXT: liveins: $sgpr16, $sgpr60, $sgpr62, $sgpr4_sgpr5,
$sgpr6_sgpr7, $sgpr8_sgpr9:0x0000000000000003, $sgpr10_sgpr11, $sgpr34_sgpr35,
$sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr44_sgpr45,
$sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67_sgpr68_sgpr69_sgpr70_sgpr71_sgpr72_sgpr73_sgpr74_sgpr75_sgpr76_sgpr77_sgpr78_sgpr79:0x0000000F00000000
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: $vcc = S_AND_B64 $exec, renamable $sgpr36_sgpr37,
implicit-def dead $scc
; CHECK-NEXT: S_CBRANCH_VCCNZ %bb.11, implicit $vcc
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.16:
; CHECK-NEXT: successors: %bb.3(0x40000000), %bb.17(0x40000000)
- ; CHECK-NEXT: liveins: $sgpr14, $sgpr15, $sgpr16
+ ; CHECK-NEXT: liveins: $sgpr16, $sgpr60, $sgpr62
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: S_CBRANCH_EXECZ %bb.3, implicit $exec
; CHECK-NEXT: {{ $}}
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