================
@@ -192,3 +177,50 @@ void RegAllocBase::enqueue(const LiveInterval *LI) {
<< " in skipped register class\n");
}
}
+
+MCPhysReg RegAllocBase::getErrorAssignment(const TargetRegisterClass &RC,
+ const MachineInstr *CtxMI) {
+ MachineFunction &MF = VRM->getMachineFunction();
+
+ // Avoid printing the error for every single instance of the register. It
+ // would be better if this were per register class.
+ bool EmitError = !MF.getProperties().hasProperty(
+ MachineFunctionProperties::Property::FailedRegAlloc);
+ if (EmitError)
+
MF.getProperties().set(MachineFunctionProperties::Property::FailedRegAlloc);
+
+ const Function &Fn = MF.getFunction();
+ LLVMContext &Context = Fn.getContext();
+
+ ArrayRef<MCPhysReg> AllocOrder = RegClassInfo.getOrder(&RC);
+ if (AllocOrder.empty()) {
+ // If the allocation order is empty, it likely means all registers in the
+ // class are reserved. We still to need to pick something, so look at the
+ // underlying class.
+ ArrayRef<MCPhysReg> RawRegs = RC.getRegisters();
+
+ if (EmitError) {
+ DiagnosticInfoRegAllocFailure DI(
+ "no registers from class available to allocate", Fn,
+ CtxMI ? CtxMI->getDebugLoc() : DiagnosticLocation());
+ Context.diagnose(DI);
+ }
+
+ assert(!RawRegs.empty() && "register classes cannot have no registers");
+ return RawRegs.front();
+ }
+
+ if (EmitError) {
----------------
qcolombet wrote:
If we emit only the first error, is there a point in even trying to continue to
compile?
I guess I am asking what is the use cases we are trying to enable with this
patch Series.
https://github.com/llvm/llvm-project/pull/119640
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