================
@@ -443,6 +443,89 @@ bool LoongArchInstrInfo::isSchedulingBoundary(const 
MachineInstr &MI,
     break;
   }
 
+  const auto &STI = MF.getSubtarget<LoongArchSubtarget>();
+  if (STI.hasFeature(LoongArch::FeatureRelax)) {
+    // When linker relaxation enabled, the following instruction patterns are
+    // prohibited from being reordered:
+    //
+    // * pcalau12i $a0, %pc_hi20(s)
+    //   addi.w/d $a0, $a0, %pc_lo12(s)
+    //
+    // * pcalau12i $a0, %got_pc_hi20(s)
+    //   ld.w/d $a0, $a0, %got_pc_lo12(s)
+    //
+    // * pcalau12i $a0, %ie_pc_hi20(s)
+    //   ld.w/d $a0, $a0, %ie_pc_lo12(s)
----------------
ylzsx wrote:

I think tls ie can be scheduled. 

https://github.com/llvm/llvm-project/pull/121330
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