github-actions[bot] wrote:
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:warning: C/C++ code formatter, clang-format found issues in your code.
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``````````bash
git-clang-format --diff 1728ab49b46a31b63d8ecdc81fe87851aa40a725
3e04401258c91639105b1f2f17a84badbdf928ae --extensions cpp,h --
llvm/include/llvm/ADT/GenericUniformityImpl.h
llvm/include/llvm/ADT/GenericUniformityInfo.h
llvm/lib/Analysis/UniformityAnalysis.cpp
llvm/lib/CodeGen/MachineUniformityAnalysis.cpp
llvm/lib/Target/AMDGPU/AMDGPUGlobalISelDivergenceLowering.cpp
llvm/lib/Target/AMDGPU/AMDGPURegBankSelect.cpp
llvm/lib/Target/AMDGPU/SILowerI1Copies.h
``````````
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View the diff from clang-format here.
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``````````diff
diff --git a/llvm/lib/Target/AMDGPU/AMDGPURegBankSelect.cpp
b/llvm/lib/Target/AMDGPU/AMDGPURegBankSelect.cpp
index 452d754985..8a0c9faa34 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPURegBankSelect.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPURegBankSelect.cpp
@@ -225,7 +225,8 @@ bool
AMDGPURegBankSelect::runOnMachineFunction(MachineFunction &MF) {
getAnalysis<MachineUniformityAnalysisPass>().getUniformityInfo();
MachineRegisterInfo &MRI = *B.getMRI();
const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>();
- RegBankSelectHelper RBSHelper(B, ILMA, MUI, *ST.getRegisterInfo(),
*ST.getRegBankInfo());
+ RegBankSelectHelper RBSHelper(B, ILMA, MUI, *ST.getRegisterInfo(),
+ *ST.getRegBankInfo());
// Virtual registers at this point don't have register banks.
// Virtual registers in def and use operands of already inst-selected
// instruction have register class.
``````````
</details>
https://github.com/llvm/llvm-project/pull/124298
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